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a381bcf5 KY |
1 | /* |
2 | * (C) Copyright 2016 Rockchip Electronics Co., Ltd | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __CONFIG_RK3399_COMMON_H | |
8 | #define __CONFIG_RK3399_COMMON_H | |
9 | ||
7f35bbb9 JC |
10 | #include "rockchip-common.h" |
11 | ||
a381bcf5 | 12 | #define CONFIG_NR_DRAM_BANKS 1 |
a381bcf5 KY |
13 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
14 | #define CONFIG_SYS_CBSIZE 1024 | |
15 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
66e87cc8 | 16 | #define CONFIG_SPL_FRAMEWORK |
3e75c07d PT |
17 | #if defined(CONFIG_SPL_SPI_SUPPORT) |
18 | #define CONFIG_SPL_SPI_LOAD | |
19 | #endif | |
a381bcf5 | 20 | |
88cb1a9e PT |
21 | #define COUNTER_FREQUENCY 24000000 |
22 | ||
a381bcf5 KY |
23 | #define CONFIG_SYS_NS16550_MEM32 |
24 | ||
25 | #define CONFIG_SYS_TEXT_BASE 0x00200000 | |
26 | #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 | |
27 | #define CONFIG_SYS_LOAD_ADDR 0x00800800 | |
3012a840 | 28 | #define CONFIG_SPL_STACK 0xff8effff |
3d54eabc | 29 | #define CONFIG_SPL_TEXT_BASE 0xff8c2000 |
5302feb6 | 30 | #define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000 |
3012a840 KY |
31 | /* BSS setup */ |
32 | #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 | |
33 | #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 | |
a381bcf5 KY |
34 | |
35 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ | |
36 | ||
37 | /* MMC/SD IP block */ | |
a381bcf5 KY |
38 | #define CONFIG_BOUNCE_BUFFER |
39 | #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 | |
40 | ||
a381bcf5 | 41 | /* RAW SD card / eMMC locations. */ |
a381bcf5 KY |
42 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) |
43 | ||
44 | /* FAT sd card locations. */ | |
45 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | |
46 | #define CONFIG_SYS_SDRAM_BASE 0 | |
6d1970fa | 47 | #define SDRAM_MAX_SIZE 0xf8000000 |
a381bcf5 KY |
48 | #define CONFIG_NR_DRAM_BANKS 1 |
49 | ||
a381bcf5 KY |
50 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
51 | ||
52 | #ifndef CONFIG_SPL_BUILD | |
a381bcf5 KY |
53 | |
54 | #define ENV_MEM_LAYOUT_SETTINGS \ | |
86d01265 KY |
55 | "scriptaddr=0x00500000\0" \ |
56 | "pxefile_addr_r=0x00600000\0" \ | |
a381bcf5 KY |
57 | "fdt_addr_r=0x01f00000\0" \ |
58 | "kernel_addr_r=0x02000000\0" \ | |
59 | "ramdisk_addr_r=0x04000000\0" | |
60 | ||
a381bcf5 KY |
61 | #include <config_distro_bootcmd.h> |
62 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
583b1bc0 KY |
63 | ENV_MEM_LAYOUT_SETTINGS \ |
64 | "partitions=" PARTS_DEFAULT \ | |
a381bcf5 KY |
65 | BOOTENV |
66 | ||
67 | #endif | |
68 | ||
923e7b44 | 69 | /* enable usb config for usb ether */ |
923e7b44 | 70 | |
a381bcf5 | 71 | #endif |