[people/ms/u-boot.git] / include / configs / s32v234evb.h

/*
 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:     GPL-2.0+
 *
 * Configuration settings for the Freescale S32V234 EVB board.
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>
#endif

#include <asm/arch/imx-regs.h>

#define CONFIG_S32V234
#define CONFIG_DM

/* Config GIC */
#define CONFIG_GICV2
#define GICD_BASE 0x7D001000
#define GICC_BASE 0x7D002000

#define CONFIG_REMAKE_ELF
#undef CONFIG_RUN_FROM_IRAM_ONLY

#define CONFIG_RUN_FROM_DDR1
#undef CONFIG_RUN_FROM_DDR0

/* Run by default from DDR1  */
#ifdef CONFIG_RUN_FROM_DDR0
#define DDR_BASE_ADDR		0x80000000
#else
#define DDR_BASE_ADDR		0xC0000000
#endif

#define CONFIG_MACH_TYPE		4146

#define CONFIG_SKIP_LOWLEVEL_INIT

/* Config CACHE */
#define CONFIG_CMD_CACHE

#define CONFIG_SYS_FULL_VA

/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG

/* SMP Spin Table Definitions */
#define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)

/* Generic Timer Definitions */
#define COUNTER_FREQUENCY               (1000000000)	/* 1000MHz */
#define CONFIG_SYS_FSL_ERRATUM_A008585

/* Size of malloc() pool */
#ifdef CONFIG_RUN_FROM_IRAM_ONLY
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1 * 1024 * 1024)
#else
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#endif

#define CONFIG_DM_SERIAL
#define CONFIG_FSL_LINFLEXUART
#define LINFLEXUART_BASE		LINFLEXD0_BASE_ADDR

#define CONFIG_DEBUG_UART_LINFLEXUART
#define CONFIG_DEBUG_UART_BASE		LINFLEXUART_BASE

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_UART_PORT		(1)

#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC_BASE_ADDR
#define CONFIG_SYS_FSL_ESDHC_NUM	1

#define CONFIG_CMD_MMC
/* #define CONFIG_CMD_EXT2 EXT2 Support */

#if 0

/* Ethernet config */
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE            ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE     RMII
#define CONFIG_FEC_MXC_PHYADDR  0
#endif

#if 0				/* Disable until the FLASH will be implemented */
#define CONFIG_SYS_USE_NAND
#endif

#ifdef CONFIG_SYS_USE_NAND
/* Nand Flash Configs */
#define CONFIG_JFFS2_NAND
#define MTD_NAND_FSL_NFC_SWECC 1
#define CONFIG_NAND_FSL_NFC
#define CONFIG_SYS_NAND_BASE		0x400E0000
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
#define CONFIG_SYS_NAND_SELECT_DEVICE
#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
#endif

#define CONFIG_LOADADDR			0xC307FFC0

#define CONFIG_EXTRA_ENV_SETTINGS \
	"boot_scripts=boot.scr.uimg boot.scr\0" \
	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	"console=ttyLF0,115200\0" \
	"fdt_file=s32v234-evb.dtb\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_addr_r=0xC2000000\0" \
	"kernel_addr_r=0xC307FFC0\0" \
	"ramdisk_addr_r=0xC4000000\0" \
	"ramdisk=rootfs.uimg\0"\
	"ip_dyn=yes\0" \
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	"update_sd_firmware_filename=u-boot.imx\0" \
	"update_sd_firmware=" \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"if mmc dev ${mmcdev}; then "	\
			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
				"setexpr fw_sz ${filesize} / 0x200; " \
				"setexpr fw_sz ${fw_sz} + 1; "	\
				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
			"fi; "	\
		"fi\0" \
	"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
	"jtagboot=echo Booting using jtag...; " \
		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
	"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
		"run loaduimage; run loadramdisk; run loadfdt;"\
		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
	"boot_net_usb_start=true\0" \
	BOOTENV

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 1) \
	func(MMC, mmc, 0) \
	func(DHCP, dhcp, na)

#define CONFIG_BOOTCOMMAND \
	"run distro_bootcmd"

#include <config_distro_bootcmd.h>

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_PROMPT		"=> "
#undef CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING

#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START	(DDR_BASE_ADDR)
#define CONFIG_SYS_MEMTEST_END		(DDR_BASE_ADDR + 0x7C00000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ				1000

#ifdef CONFIG_RUN_FROM_IRAM_ONLY
#define CONFIG_SYS_MALLOC_BASE		(DDR_BASE_ADDR)
#endif

#if 0
/* Configure PXE */
#define CONFIG_BOOTP_PXE
#define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
#endif

/* Physical memory map */
/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			(DDR_BASE_ADDR)
#define PHYS_SDRAM_SIZE			(256 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0


#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

#endif
Commit	Line	Data
9702ec00 EP	1	/*
	2	* (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*
	6	* Configuration settings for the Freescale S32V234 EVB board.
	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#ifndef CONFIG_SPL_BUILD
	13	#include <config_distro_defaults.h>
	14	#endif
	15
	16	#include <asm/arch/imx-regs.h>
	17
	18	#define CONFIG_S32V234
	19	#define CONFIG_DM
	20
9702ec00 EP	21	/* Config GIC */
	22	#define CONFIG_GICV2
	23	#define GICD_BASE 0x7D001000
	24	#define GICC_BASE 0x7D002000
	25
	26	#define CONFIG_REMAKE_ELF
	27	#undef CONFIG_RUN_FROM_IRAM_ONLY
	28
	29	#define CONFIG_RUN_FROM_DDR1
	30	#undef CONFIG_RUN_FROM_DDR0
	31
	32	/* Run by default from DDR1 */
	33	#ifdef CONFIG_RUN_FROM_DDR0
	34	#define DDR_BASE_ADDR 0x80000000
	35	#else
	36	#define DDR_BASE_ADDR 0xC0000000
	37	#endif
	38
	39	#define CONFIG_MACH_TYPE 4146
	40
	41	#define CONFIG_SKIP_LOWLEVEL_INIT
	42
	43	/* Config CACHE */
	44	#define CONFIG_CMD_CACHE
	45
	46	#define CONFIG_SYS_FULL_VA
	47
	48	/* Enable passing of ATAGs */
	49	#define CONFIG_CMDLINE_TAG
	50
	51	/* SMP Spin Table Definitions */
	52	#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
	53
	54	/* Generic Timer Definitions */
	55	#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
	56	#define CONFIG_SYS_FSL_ERRATUM_A008585
	57
	58	/* Size of malloc() pool */
	59	#ifdef CONFIG_RUN_FROM_IRAM_ONLY
	60	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
	61	#else
	62	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	63	#endif
9702ec00 EP	64
	65	#define CONFIG_DM_SERIAL
	66	#define CONFIG_FSL_LINFLEXUART
	67	#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
	68
	69	#define CONFIG_DEBUG_UART_LINFLEXUART
	70	#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
	71
	72	/* Allow to overwrite serial and ethaddr */
	73	#define CONFIG_ENV_OVERWRITE
	74	#define CONFIG_SYS_UART_PORT (1)
9702ec00	75
9702ec00 EP	76	#define CONFIG_FSL_ESDHC
	77	#define CONFIG_FSL_USDHC
	78	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
	79	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	80
9702ec00	81	#define CONFIG_CMD_MMC
9702ec00	82	/* #define CONFIG_CMD_EXT2 EXT2 Support */
9702ec00 EP	83
	84	#if 0
	85
	86	/* Ethernet config */
	87	#define CONFIG_CMD_PING
9702ec00 EP	88	#define CONFIG_CMD_MII
	89	#define CONFIG_FEC_MXC
	90	#define CONFIG_MII
	91	#define IMX_FEC_BASE ENET_BASE_ADDR
	92	#define CONFIG_FEC_XCV_TYPE RMII
	93	#define CONFIG_FEC_MXC_PHYADDR 0
9702ec00 EP	94	#endif
9702ec00 EP	95
9702ec00 EP	96	#if 0 /* Disable until the FLASH will be implemented */
	97	#define CONFIG_SYS_USE_NAND
	98	#endif
	99
	100	#ifdef CONFIG_SYS_USE_NAND
	101	/* Nand Flash Configs */
9702ec00 EP	102	#define CONFIG_JFFS2_NAND
	103	#define MTD_NAND_FSL_NFC_SWECC 1
	104	#define CONFIG_NAND_FSL_NFC
	105	#define CONFIG_SYS_NAND_BASE 0x400E0000
	106	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	107	#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
	108	#define CONFIG_SYS_NAND_SELECT_DEVICE
	109	#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
	110	#endif
	111
9702ec00	112	#define CONFIG_LOADADDR 0xC307FFC0
9702ec00	113
9702ec00 EP	114	#define CONFIG_EXTRA_ENV_SETTINGS \
	115	"boot_scripts=boot.scr.uimg boot.scr\0" \
	116	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	117	"console=ttyLF0,115200\0" \
	118	"fdt_file=s32v234-evb.dtb\0" \
	119	"fdt_high=0xffffffff\0" \
	120	"initrd_high=0xffffffff\0" \
	121	"fdt_addr_r=0xC2000000\0" \
	122	"kernel_addr_r=0xC307FFC0\0" \
	123	"ramdisk_addr_r=0xC4000000\0" \
	124	"ramdisk=rootfs.uimg\0"\
	125	"ip_dyn=yes\0" \
	126	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	127	"update_sd_firmware_filename=u-boot.imx\0" \
	128	"update_sd_firmware=" \
	129	"if test ${ip_dyn} = yes; then " \
	130	"setenv get_cmd dhcp; " \
	131	"else " \
	132	"setenv get_cmd tftp; " \
	133	"fi; " \
	134	"if mmc dev ${mmcdev}; then " \
	135	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
	136	"setexpr fw_sz ${filesize} / 0x200; " \
	137	"setexpr fw_sz ${fw_sz} + 1; " \
	138	"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
	139	"fi; " \
	140	"fi\0" \
	141	"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
	142	"jtagboot=echo Booting using jtag...; " \
	143	"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
	144	"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
	145	"run loaduimage; run loadramdisk; run loadfdt;"\
	146	"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
	147	"boot_net_usb_start=true\0" \
	148	BOOTENV
	149
	150	#define BOOT_TARGET_DEVICES(func) \
	151	func(MMC, mmc, 1) \
	152	func(MMC, mmc, 0) \
	153	func(DHCP, dhcp, na)
	154
	155	#define CONFIG_BOOTCOMMAND \
	156	"run distro_bootcmd"
	157
	158	#include <config_distro_bootcmd.h>
	159
	160	/* Miscellaneous configurable options */
	161	#define CONFIG_SYS_LONGHELP /* undef to save memory */
9702ec00 EP	162	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	163	#define CONFIG_SYS_PROMPT "=> "
	164	#undef CONFIG_AUTO_COMPLETE
9702ec00 EP	165	#define CONFIG_CMDLINE_EDITING
	166
	167	#define CONFIG_CMD_MEMTEST
	168	#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
	169	#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
	170
	171	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	172	#define CONFIG_SYS_HZ 1000
	173
9702ec00 EP	174	#ifdef CONFIG_RUN_FROM_IRAM_ONLY
	175	#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
	176	#endif
	177
9702ec00 EP	178	#if 0
9702ec00 EP	179	/* Configure PXE */
9702ec00 EP	180	#define CONFIG_BOOTP_PXE
	181	#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
	182	#endif
	183
	184	/* Physical memory map */
	185	/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
	186	#define CONFIG_NR_DRAM_BANKS 1
	187	#define PHYS_SDRAM (DDR_BASE_ADDR)
	188	#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
	189
	190	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	191	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	192	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	193
	194	#define CONFIG_SYS_INIT_SP_OFFSET \
	195	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	196	#define CONFIG_SYS_INIT_SP_ADDR \
	197	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	198
e856bdcf	199	/* environment organization */
9702ec00	200	#define CONFIG_ENV_SIZE (8 * 1024)
9702ec00 EP	201
	202	#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
	203	#define CONFIG_SYS_MMC_ENV_DEV 0
	204
	205
	206	#define CONFIG_BOOTP_BOOTFILESIZE
	207	#define CONFIG_BOOTP_BOOTPATH
	208	#define CONFIG_BOOTP_GATEWAY
	209	#define CONFIG_BOOTP_HOSTNAME
	210
	211	#endif