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c474a8eb MK |
1 | /* |
2 | * Copyright (C) 2009 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * Kyungmin Park <kyungmin.park@samsung.com> | |
5 | * | |
6 | * Configuation settings for the SAMSUNG Universal (s5pc100) board. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
c474a8eb MK |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | /* High Level Configuration Options */ | |
c474a8eb | 15 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 16 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
c474a8eb MK |
17 | #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ |
18 | #define CONFIG_MACH_GONI 1 /* working with Goni */ | |
19 | ||
a45ddf7a | 20 | #include <linux/sizes.h> |
c474a8eb MK |
21 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
22 | ||
23 | #define CONFIG_ARCH_CPU_INIT | |
c474a8eb | 24 | |
c474a8eb MK |
25 | /* input clock of PLL: has 24MHz input clock at S5PC110 */ |
26 | #define CONFIG_SYS_CLK_FREQ_C110 24000000 | |
27 | ||
28 | /* DRAM Base */ | |
29 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
30 | ||
35bea619 MK |
31 | /* Text Base */ |
32 | #define CONFIG_SYS_TEXT_BASE 0x34800000 | |
33 | ||
c474a8eb MK |
34 | #define CONFIG_SETUP_MEMORY_TAGS |
35 | #define CONFIG_CMDLINE_TAG | |
2ac9a35b | 36 | #define CONFIG_REVISION_TAG |
c474a8eb MK |
37 | #define CONFIG_INITRD_TAG |
38 | #define CONFIG_CMDLINE_EDITING | |
39 | ||
2ecd7797 | 40 | /* Size of malloc() pool before and after relocation */ |
2ecd7797 | 41 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) |
a45ddf7a | 42 | |
c474a8eb MK |
43 | /* |
44 | * select serial console configuration | |
45 | */ | |
46 | #define CONFIG_SERIAL2 1 /* use SERIAL2 */ | |
c474a8eb MK |
47 | #define CONFIG_BAUDRATE 115200 |
48 | ||
87f314e9 | 49 | /* MMC */ |
311757be | 50 | #define SDHCI_MAX_HOSTS 4 |
87f314e9 | 51 | |
96caf02f MK |
52 | /* PWM */ |
53 | #define CONFIG_PWM 1 | |
54 | ||
c474a8eb MK |
55 | #define CONFIG_CMD_REGINFO |
56 | #define CONFIG_CMD_ONENAND | |
c474a8eb | 57 | |
2d281b32 | 58 | /* USB Composite download gadget - g_dnl */ |
0fabb6af ŁM |
59 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M |
60 | #define DFU_DEFAULT_POLL_TIMEOUT 300 | |
61 | ||
62 | /* TIZEN THOR downloader support */ | |
63 | #define CONFIG_CMD_THOR_DOWNLOAD | |
01acd6ab | 64 | #define CONFIG_USB_FUNCTION_THOR |
c474a8eb | 65 | |
2d281b32 | 66 | /* USB Samsung's IDs */ |
e6c0bc06 SP |
67 | |
68 | #define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 | |
0fabb6af | 69 | #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D |
124c5998 ŁM |
70 | #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 |
71 | #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 | |
c474a8eb MK |
72 | |
73 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ | |
74 | #define MTDIDS_DEFAULT "onenand0=samsung-onenand" | |
75 | #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\ | |
76 | ",256k(params)"\ | |
77 | ",2816k(config)"\ | |
78 | ",8m(csa)"\ | |
79 | ",7m(kernel)"\ | |
80 | ",1m(log)"\ | |
81 | ",12m(modem)"\ | |
a45ddf7a | 82 | ",60m(qboot)\0" |
c474a8eb | 83 | |
2d281b32 MZ |
84 | /* partitions definitions */ |
85 | #define PARTS_CSA "csa-mmc" | |
86 | #define PARTS_BOOTLOADER "u-boot" | |
87 | #define PARTS_BOOT "boot" | |
88 | #define PARTS_ROOT "platform" | |
89 | #define PARTS_DATA "data" | |
90 | #define PARTS_CSC "csc" | |
91 | #define PARTS_UMS "ums" | |
92 | ||
93 | #define CONFIG_DFU_ALT \ | |
94 | "u-boot raw 0x80 0x400;" \ | |
95 | "uImage ext4 0 2;" \ | |
96 | "exynos3-goni.dtb ext4 0 2;" \ | |
97 | ""PARTS_ROOT" part 0 5\0" | |
98 | ||
99 | #define PARTS_DEFAULT \ | |
100 | "uuid_disk=${uuid_gpt_disk};" \ | |
101 | "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ | |
102 | "name="PARTS_BOOTLOADER",size=60MiB," \ | |
103 | "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ | |
104 | "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ | |
105 | "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ | |
106 | "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ | |
107 | "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ | |
108 | "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ | |
c474a8eb | 109 | |
a45ddf7a | 110 | #define CONFIG_BOOTCOMMAND "run mmcboot" |
c474a8eb MK |
111 | |
112 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" | |
113 | ||
a45ddf7a | 114 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext4" \ |
c474a8eb MK |
115 | " ${console} ${meminfo}" |
116 | ||
117 | #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" | |
118 | ||
a45ddf7a MZ |
119 | #define CONFIG_BOOTARGS "root=/dev/mtdblock8 rootfstype=ext4 " \ |
120 | CONFIG_COMMON_BOOT | |
c474a8eb MK |
121 | |
122 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ | |
123 | " onenand write 0x32008000 0x0 0x100000\0" | |
124 | ||
2ac9a35b PW |
125 | #define CONFIG_MISC_COMMON |
126 | #define CONFIG_MISC_INIT_R | |
127 | ||
c474a8eb | 128 | #define CONFIG_ENV_OVERWRITE |
2ac9a35b PW |
129 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
130 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
c474a8eb MK |
131 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
132 | CONFIG_UPDATEB \ | |
133 | "updatek=" \ | |
134 | "onenand erase 0xc00000 0x600000;" \ | |
135 | "onenand write 0x31008000 0xc00000 0x600000\0" \ | |
136 | "updateu=" \ | |
137 | "onenand erase 0x01560000 0x1eaa0000;" \ | |
138 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
139 | "bootk=" \ | |
a45ddf7a | 140 | "run loaduimage;" \ |
c474a8eb MK |
141 | "bootm 0x30007FC0\0" \ |
142 | "flashboot=" \ | |
143 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
a45ddf7a | 144 | "rootfstype=${rootfstype} ${opts} " \ |
c474a8eb MK |
145 | "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ |
146 | "ubifsboot=" \ | |
147 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
a45ddf7a | 148 | "${opts} ${lcdinfo} " \ |
c474a8eb MK |
149 | CONFIG_COMMON_BOOT "; run bootk\0" \ |
150 | "tftpboot=" \ | |
151 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
a45ddf7a MZ |
152 | "${opts} ${lcdinfo} " CONFIG_COMMON_BOOT \ |
153 | "; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \ | |
c474a8eb MK |
154 | "ramboot=" \ |
155 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
a45ddf7a | 156 | "initrd=0x33000000,8M ramdisk=8192\0" \ |
c474a8eb | 157 | "mmcboot=" \ |
a45ddf7a MZ |
158 | "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ |
159 | "rootfstype=${rootfstype} ${opts} ${lcdinfo} " \ | |
c474a8eb MK |
160 | CONFIG_COMMON_BOOT "; run bootk\0" \ |
161 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
162 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
163 | "verify=n\0" \ | |
a45ddf7a | 164 | "rootfstype=ext4\0" \ |
c474a8eb | 165 | "console=" CONFIG_DEFAULT_CONSOLE \ |
c474a8eb | 166 | "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ |
2d281b32 | 167 | "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ |
a45ddf7a MZ |
168 | "mmcdev=0\0" \ |
169 | "mmcbootpart=2\0" \ | |
170 | "mmcrootpart=5\0" \ | |
2d281b32 | 171 | "partitions=" PARTS_DEFAULT \ |
c474a8eb MK |
172 | "bootblock=9\0" \ |
173 | "ubiblock=8\0" \ | |
174 | "ubi=enabled\0" \ | |
2d281b32 MZ |
175 | "opts=always_resume=1\0" \ |
176 | "dfu_alt_info=" CONFIG_DFU_ALT "\0" | |
c474a8eb | 177 | |
c474a8eb | 178 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
c474a8eb MK |
179 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
180 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
181 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
182 | /* Boot Argument Buffer Size */ | |
183 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
184 | /* memtest works on */ | |
185 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
186 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) | |
187 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) | |
188 | ||
c474a8eb MK |
189 | /* Goni has 3 banks of DRAM, but swap the bank */ |
190 | #define CONFIG_NR_DRAM_BANKS 3 | |
191 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ | |
192 | #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ | |
193 | #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ | |
194 | #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ | |
195 | #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ | |
196 | #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ | |
197 | ||
198 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
199 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
200 | ||
201 | /* FLASH and environment organization */ | |
34ecd694 ŁM |
202 | #define CONFIG_MMC_DEFAULT_DEV 0 |
203 | #define CONFIG_ENV_IS_IN_MMC | |
204 | #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV | |
205 | #define CONFIG_ENV_SIZE 4096 | |
206 | #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ | |
207 | #define CONFIG_ENV_OVERWRITE | |
c474a8eb MK |
208 | |
209 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
210 | #define CONFIG_SAMSUNG_ONENAND 1 | |
211 | #define CONFIG_SYS_ONENAND_BASE 0xB0000000 | |
212 | ||
a45ddf7a MZ |
213 | /* write support for filesystems */ |
214 | #define CONFIG_FAT_WRITE | |
215 | #define CONFIG_EXT4_WRITE | |
216 | ||
a3c274de | 217 | /* GPT */ |
a3c274de | 218 | |
177feff3 MK |
219 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
220 | ||
e30824f4 | 221 | #define CONFIG_USB_GADGET_DWC2_OTG_PHY |
01acd6ab | 222 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
85776b02 | 223 | |
c474a8eb | 224 | #endif /* __CONFIG_H */ |