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c474a8eb MK |
1 | /* |
2 | * Copyright (C) 2009 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * Kyungmin Park <kyungmin.park@samsung.com> | |
5 | * | |
6 | * Configuation settings for the SAMSUNG Universal (s5pc100) board. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
c474a8eb MK |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | /* High Level Configuration Options */ | |
c474a8eb | 15 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 16 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
c474a8eb MK |
17 | #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ |
18 | #define CONFIG_MACH_GONI 1 /* working with Goni */ | |
19 | ||
20 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
21 | ||
22 | #define CONFIG_ARCH_CPU_INIT | |
23 | #define CONFIG_DISPLAY_CPUINFO | |
24 | #define CONFIG_DISPLAY_BOARDINFO | |
25 | ||
c474a8eb MK |
26 | /* input clock of PLL: has 24MHz input clock at S5PC110 */ |
27 | #define CONFIG_SYS_CLK_FREQ_C110 24000000 | |
28 | ||
29 | /* DRAM Base */ | |
30 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
31 | ||
35bea619 MK |
32 | /* Text Base */ |
33 | #define CONFIG_SYS_TEXT_BASE 0x34800000 | |
34 | ||
c474a8eb MK |
35 | #define CONFIG_SETUP_MEMORY_TAGS |
36 | #define CONFIG_CMDLINE_TAG | |
37 | #define CONFIG_INITRD_TAG | |
38 | #define CONFIG_CMDLINE_EDITING | |
39 | ||
40 | /* | |
41 | * Size of malloc() pool | |
42 | * 1MB = 0x100000, 0x100000 = 1024 * 1024 | |
43 | */ | |
44 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
c474a8eb MK |
45 | /* |
46 | * select serial console configuration | |
47 | */ | |
48 | #define CONFIG_SERIAL2 1 /* use SERIAL2 */ | |
c474a8eb MK |
49 | #define CONFIG_BAUDRATE 115200 |
50 | ||
87f314e9 | 51 | /* MMC */ |
7d2d58b4 JC |
52 | #define CONFIG_GENERIC_MMC |
53 | #define CONFIG_MMC | |
54 | #define CONFIG_SDHCI | |
55 | #define CONFIG_S5P_SDHCI | |
87f314e9 | 56 | |
96caf02f MK |
57 | /* PWM */ |
58 | #define CONFIG_PWM 1 | |
59 | ||
c474a8eb MK |
60 | /* It should define before config_cmd_default.h */ |
61 | #define CONFIG_SYS_NO_FLASH 1 | |
62 | ||
63 | /* Command definition */ | |
64 | #include <config_cmd_default.h> | |
65 | ||
66 | #undef CONFIG_CMD_FPGA | |
67 | #undef CONFIG_CMD_MISC | |
68 | #undef CONFIG_CMD_NET | |
69 | #undef CONFIG_CMD_NFS | |
70 | #undef CONFIG_CMD_XIMG | |
71 | #define CONFIG_CMD_CACHE | |
72 | #define CONFIG_CMD_REGINFO | |
73 | #define CONFIG_CMD_ONENAND | |
74 | #define CONFIG_CMD_MTDPARTS | |
87f314e9 | 75 | #define CONFIG_CMD_MMC |
c474a8eb MK |
76 | |
77 | #define CONFIG_BOOTDELAY 1 | |
78 | #define CONFIG_ZERO_BOOTDELAY_CHECK | |
79 | ||
80 | #define CONFIG_MTD_DEVICE | |
81 | #define CONFIG_MTD_PARTITIONS | |
82 | ||
83 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ | |
84 | #define MTDIDS_DEFAULT "onenand0=samsung-onenand" | |
85 | #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\ | |
86 | ",256k(params)"\ | |
87 | ",2816k(config)"\ | |
88 | ",8m(csa)"\ | |
89 | ",7m(kernel)"\ | |
90 | ",1m(log)"\ | |
91 | ",12m(modem)"\ | |
92 | ",60m(qboot)"\ | |
93 | ",-(UBI)\0" | |
94 | ||
95 | #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT | |
96 | ||
97 | #define CONFIG_BOOTCOMMAND "run ubifsboot" | |
98 | ||
99 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" | |
100 | ||
101 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ | |
102 | " ${console} ${meminfo}" | |
103 | ||
104 | #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" | |
105 | ||
106 | #define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \ | |
107 | " rootfstype=cramfs " CONFIG_COMMON_BOOT | |
108 | ||
109 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ | |
110 | " onenand write 0x32008000 0x0 0x100000\0" | |
111 | ||
112 | #define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6" | |
113 | ||
114 | #define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc" | |
115 | ||
116 | #define CONFIG_ENV_OVERWRITE | |
117 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
118 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
119 | CONFIG_UPDATEB \ | |
120 | "updatek=" \ | |
121 | "onenand erase 0xc00000 0x600000;" \ | |
122 | "onenand write 0x31008000 0xc00000 0x600000\0" \ | |
123 | "updateu=" \ | |
124 | "onenand erase 0x01560000 0x1eaa0000;" \ | |
125 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
126 | "bootk=" \ | |
127 | "onenand read 0x30007FC0 0xc00000 0x600000;" \ | |
128 | "bootm 0x30007FC0\0" \ | |
129 | "flashboot=" \ | |
130 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
131 | "rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \ | |
132 | "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ | |
133 | "ubifsboot=" \ | |
134 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
135 | CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
136 | CONFIG_COMMON_BOOT "; run bootk\0" \ | |
137 | "tftpboot=" \ | |
138 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
139 | CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
140 | CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \ | |
141 | "bootm 0x30007FC0\0" \ | |
142 | "ramboot=" \ | |
143 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
144 | " initrd=0x33000000,8M ramdisk=8192\0" \ | |
145 | "mmcboot=" \ | |
146 | "set bootargs root=${mmcblk} rootfstype=${rootfstype}" \ | |
147 | CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
148 | CONFIG_COMMON_BOOT "; run bootk\0" \ | |
149 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
150 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
151 | "verify=n\0" \ | |
152 | "rootfstype=cramfs\0" \ | |
153 | "console=" CONFIG_DEFAULT_CONSOLE \ | |
154 | "mtdparts=" MTDPARTS_DEFAULT \ | |
155 | "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ | |
156 | "mmcblk=/dev/mmcblk1p1\0" \ | |
157 | "bootblock=9\0" \ | |
158 | "ubiblock=8\0" \ | |
159 | "ubi=enabled\0" \ | |
160 | "opts=always_resume=1" | |
161 | ||
162 | /* Miscellaneous configurable options */ | |
163 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
164 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
c474a8eb MK |
165 | #define CONFIG_SYS_PROMPT "Goni # " |
166 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
167 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
168 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
169 | /* Boot Argument Buffer Size */ | |
170 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
171 | /* memtest works on */ | |
172 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
173 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) | |
174 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) | |
175 | ||
c474a8eb MK |
176 | /* Goni has 3 banks of DRAM, but swap the bank */ |
177 | #define CONFIG_NR_DRAM_BANKS 3 | |
178 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ | |
179 | #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ | |
180 | #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ | |
181 | #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ | |
182 | #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ | |
183 | #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ | |
184 | ||
185 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
186 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
187 | ||
188 | /* FLASH and environment organization */ | |
189 | #define CONFIG_ENV_IS_IN_ONENAND 1 | |
190 | #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB, 0x40000 */ | |
191 | #define CONFIG_ENV_ADDR (1 << 20) /* 1 MB, 0x100000 */ | |
192 | ||
193 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
194 | #define CONFIG_SAMSUNG_ONENAND 1 | |
195 | #define CONFIG_SYS_ONENAND_BASE 0xB0000000 | |
196 | ||
197 | #define CONFIG_DOS_PARTITION 1 | |
198 | ||
177feff3 MK |
199 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
200 | ||
7cb54948 ŁM |
201 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
202 | ||
be3b51aa ŁM |
203 | #define CONFIG_POWER |
204 | #define CONFIG_POWER_I2C | |
205 | #define CONFIG_POWER_MAX8998 | |
2a7dd9d7 | 206 | |
85776b02 ŁM |
207 | #include <asm/arch/gpio.h> |
208 | /* | |
209 | * I2C Settings | |
210 | */ | |
8475c869 PM |
211 | #define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3) |
212 | #define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0) | |
85776b02 | 213 | |
ea818dbb HS |
214 | #define CONFIG_SYS_I2C |
215 | #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ | |
216 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 | |
217 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F | |
85776b02 ŁM |
218 | #define CONFIG_I2C_MULTI_BUS |
219 | #define CONFIG_SYS_MAX_I2C_BUS 7 | |
a954da29 ŁM |
220 | #define CONFIG_USB_GADGET |
221 | #define CONFIG_USB_GADGET_S3C_UDC_OTG | |
222 | #define CONFIG_USB_GADGET_DUALSPEED | |
85776b02 | 223 | |
c474a8eb | 224 | #endif /* __CONFIG_H */ |