[people/ms/u-boot.git] / include / configs / s5pc210_universal.h

/*
 * Copyright (C) 2010 Samsung Electronics
 * Minkyu Kang <mk7.kang@samsung.com>
 *
 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
#define CONFIG_S5P		1	/* which is in a S5P Family */
#define CONFIG_EXYNOS4210	1	/* which is in a EXYNOS4210 */
#define CONFIG_UNIVERSAL	1	/* working with Universal */
#define CONFIG_TIZEN		1	/* TIZEN lib */

#include <asm/arch/cpu.h>		/* get chip and board defs */

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

/* Keep L2 Cache Disabled */
#define CONFIG_SYS_L2CACHE_OFF		1

#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_TEXT_BASE		0x44800000

/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
#define CONFIG_SYS_CLK_FREQ_C210	24000000
#define CONFIG_SYS_CLK_FREQ		CONFIG_SYS_CLK_FREQ_C210

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))

/* select serial console configuration */
#define CONFIG_SERIAL2		1	/* use SERIAL 2 */
#define CONFIG_BAUDRATE		115200

/* MMC */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI

/* PWM */
#define CONFIG_PWM			1

/* It should define before config_cmd_default.h */
#define CONFIG_SYS_NO_FLASH		1

/* Command definition */
#include <config_cmd_default.h>

#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_XIMG
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_ONENAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
#define CONFIG_CMD_FAT

#define CONFIG_BOOTDELAY		1
#define CONFIG_ZERO_BOOTDELAY_CHECK

#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS

/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
#define MTDIDS_DEFAULT		"onenand0=samsung-onenand"

#define MTDPARTS_DEFAULT	"mtdparts=samsung-onenand:"\
				"128k(s-boot)"\
				",896k(bootloader)"\
				",256k(params)"\
				",2816k(config)"\
				",8m(csa)"\
				",7m(kernel)"\
				",1m(log)"\
				",12m(modem)"\
				",60m(qboot)"\
				",-(UBI)\0"

#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT

#define MBRPARTS_DEFAULT	"20M(permanent)"\
				",20M(boot)"\
				",1G(system)"\
				",100M(swap)"\
				",-(UMS)\0"

#define CONFIG_BOOTARGS		"Please use defined boot"
#define CONFIG_BOOTCOMMAND	"run mmcboot"
#define CONFIG_DEFAULT_CONSOLE	"console=ttySAC2,115200n8\0"

#define CONFIG_ENV_UBI_MTD	" ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
#define CONFIG_BOOTBLOCK	"10"
#define CONFIG_UBIBLOCK		"9"

#define CONFIG_ENV_UBIFS_OPTION	" rootflags=bulk_read,no_chk_data_crc "
#define CONFIG_ENV_FLASHBOOT	CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
				"${mtdparts}"

#define CONFIG_ENV_COMMON_BOOT	"${console} ${meminfo}"

#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

#define CONFIG_EXTRA_ENV_SETTINGS					\
	"updateb=" \
		"onenand erase 0x0 0x100000;" \
		"onenand write 0x42008000 0x0 0x100000\0" \
	"updatek=" \
		"onenand erase 0xc00000 0x500000;" \
		"onenand write 0x41008000 0xc00000 0x500000\0" \
	"bootk=" \
		"run loaduimage; bootm 0x40007FC0\0" \
	"updatemmc=" \
		"mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
		"mmc boot 0 1 1 0\0" \
	"updatebackup=" \
		"mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
		"mmc boot 0 1 1 0\0" \
	"updatebootb=" \
		"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
	"lpj=lpj=3981312\0" \
	"ubifsboot=" \
		"set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
		CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
		CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
	"tftpboot=" \
		"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
		CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
		CONFIG_ENV_COMMON_BOOT \
		"; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
	"nfsboot=" \
		"set bootargs root=/dev/nfs rw " \
		"nfsroot=${nfsroot},nolock,tcp " \
		"ip=${ipaddr}:${serverip}:${gatewayip}:" \
		"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
		"; run bootk\0" \
	"ramfsboot=" \
		"set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
		"${console} ${meminfo} " \
		"initrd=0x43000000,8M ramdisk=8192\0" \
	"mmcboot=" \
		"set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
		"run loaduimage; bootm 0x40007FC0\0" \
	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
	"verify=n\0" \
	"rootfstype=ext4\0" \
	"console=" CONFIG_DEFAULT_CONSOLE \
	"mtdparts=" MTDPARTS_DEFAULT \
	"mbrparts=" MBRPARTS_DEFAULT \
	"meminfo=crashkernel=32M@0x50000000\0" \
	"nfsroot=/nfsroot/arm\0" \
	"bootblock=" CONFIG_BOOTBLOCK "\0" \
	"ubiblock=" CONFIG_UBIBLOCK" \0" \
	"ubi=enabled\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
	"mmcdev=0\0" \
	"mmcbootpart=2\0" \
	"mmcrootpart=3\0" \
	"opts=always_resume=1"

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser	*/
#define CONFIG_SYS_PROMPT	"Universal # "
#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)

#define CONFIG_SYS_HZ			1000

/* Universal has 2 banks of DRAM */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
#define PHYS_SDRAM_1_SIZE	(256 << 20)		/* 256 MB in CS 0 */
#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
#define PHYS_SDRAM_2_SIZE	(256 << 20)		/* 256 MB in CS 0 */

#define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */

#define CONFIG_USE_ONENAND_BOARD_INIT
#define CONFIG_SAMSUNG_ONENAND
#define CONFIG_SYS_ONENAND_BASE		0x0C000000

#define CONFIG_ENV_IS_IN_MMC		1
#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_ENV_SIZE			4096
#define CONFIG_ENV_OFFSET		((32 - 4) << 10)/* 32KiB - 4KiB */

#define CONFIG_DOS_PARTITION		1

#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_CACHELINE_SIZE       32

#include <asm/arch/gpio.h>
/*
 * I2C Settings
 */
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)

#define CONFIG_SOFT_I2C
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_SPEED	50000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS	7

#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_MAX8998

#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED

/*
 * SPI Settings
 */
#define CONFIG_SOFT_SPI
#define CONFIG_SOFT_SPI_MODE SPI_MODE_3
#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)

#define SPI_DELAY udelay(1)
#undef SPI_INIT
#define SPI_SCL(bit) universal_spi_scl(bit)
#define SPI_SDA(bit) universal_spi_sda(bit)
#define SPI_READ universal_spi_read()
#ifndef	__ASSEMBLY__
void universal_spi_scl(int bit);
void universal_spi_sda(int bit);
int universal_spi_read(void);
#endif

/*
 * LCD Settings
 */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
#define CONFIG_BMP_32BPP
#define CONFIG_LD9040
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12))

#endif	/* __CONFIG_H */
Commit	Line	Data
9e40808c MK	1	/*
	2	* Copyright (C) 2010 Samsung Electronics
	3	* Minkyu Kang <mk7.kang@samsung.com>
	4	*
393cb361	5	* Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
9e40808c	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
9e40808c MK	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	/*
	14	* High Level Configuration Options
	15	* (easy to change)
	16	*/
9e40808c MK	17	#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
9e40808c MK	18	#define CONFIG_S5P 1 /* which is in a S5P Family */
393cb361	19	#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
9e40808c	20	#define CONFIG_UNIVERSAL 1 /* working with Universal */
d984b9f8	21	#define CONFIG_TIZEN 1 /* TIZEN lib */
9e40808c MK	22
	23	#include <asm/arch/cpu.h> /* get chip and board defs */
	24
	25	#define CONFIG_ARCH_CPU_INIT
	26	#define CONFIG_DISPLAY_CPUINFO
	27	#define CONFIG_DISPLAY_BOARDINFO
	28
	29	/* Keep L2 Cache Disabled */
e47f2db5	30	#define CONFIG_SYS_L2CACHE_OFF 1
9e40808c MK	31
	32	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	33	#define CONFIG_SYS_TEXT_BASE 0x44800000
	34
393cb361	35	/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
9e40808c	36	#define CONFIG_SYS_CLK_FREQ_C210 24000000
5e46f83c	37	#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
9e40808c MK	38
	39	#define CONFIG_SETUP_MEMORY_TAGS
	40	#define CONFIG_CMDLINE_TAG
	41	#define CONFIG_INITRD_TAG
	42	#define CONFIG_REVISION_TAG
	43	#define CONFIG_CMDLINE_EDITING
11a44798 PW	44	#define CONFIG_SKIP_LOWLEVEL_INIT
11a44798 PW	45	#define CONFIG_BOARD_EARLY_INIT_F
9e40808c MK	46
	47	/* Size of malloc() pool */
	48	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
	49
	50	/* select serial console configuration */
9e40808c MK	51	#define CONFIG_SERIAL2 1 /* use SERIAL 2 */
	52	#define CONFIG_BAUDRATE 115200
	53
	54	/* MMC */
7d2d58b4 JC	55	#define CONFIG_GENERIC_MMC
	56	#define CONFIG_MMC
	57	#define CONFIG_SDHCI
	58	#define CONFIG_S5P_SDHCI
9e40808c	59
aa44a45f MK	60	/* PWM */
	61	#define CONFIG_PWM 1
	62
9e40808c MK	63	/* It should define before config_cmd_default.h */
	64	#define CONFIG_SYS_NO_FLASH 1
	65
	66	/* Command definition */
	67	#include <config_cmd_default.h>
	68
	69	#undef CONFIG_CMD_FPGA
	70	#undef CONFIG_CMD_MISC
	71	#undef CONFIG_CMD_NET
	72	#undef CONFIG_CMD_NFS
	73	#undef CONFIG_CMD_XIMG
	74	#define CONFIG_CMD_CACHE
	75	#define CONFIG_CMD_ONENAND
	76	#define CONFIG_CMD_MTDPARTS
	77	#define CONFIG_CMD_MMC
	78	#define CONFIG_CMD_FAT
	79
	80	#define CONFIG_BOOTDELAY 1
	81	#define CONFIG_ZERO_BOOTDELAY_CHECK
	82
	83	#define CONFIG_MTD_DEVICE
	84	#define CONFIG_MTD_PARTITIONS
	85
	86	/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
	87	#define MTDIDS_DEFAULT "onenand0=samsung-onenand"
	88
	89	#define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\
	90	"128k(s-boot)"\
	91	",896k(bootloader)"\
	92	",256k(params)"\
	93	",2816k(config)"\
	94	",8m(csa)"\
	95	",7m(kernel)"\
	96	",1m(log)"\
	97	",12m(modem)"\
	98	",60m(qboot)"\
	99	",-(UBI)\0"
	100
	101	#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
	102
	103	#define MBRPARTS_DEFAULT "20M(permanent)"\
	104	",20M(boot)"\
	105	",1G(system)"\
	106	",100M(swap)"\
	107	",-(UMS)\0"
	108
	109	#define CONFIG_BOOTARGS "Please use defined boot"
	110	#define CONFIG_BOOTCOMMAND "run mmcboot"
	111	#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
	112
	113	#define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
	114	#define CONFIG_BOOTBLOCK "10"
	115	#define CONFIG_UBIBLOCK "9"
	116
	117	#define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
	118	#define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
	119	"${mtdparts}"
	120
	121	#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
	122
	123	#define CONFIG_ENV_OVERWRITE
	124	#define CONFIG_SYS_CONSOLE_INFO_QUIET
	125	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	126
127	#define CONFIG_EXTRA_ENV_SETTINGS \
128	"updateb=" \
129	"onenand erase 0x0 0x100000;" \
130	"onenand write 0x42008000 0x0 0x100000\0" \
131	"updatek=" \
132	"onenand erase 0xc00000 0x500000;" \
133	"onenand write 0x41008000 0xc00000 0x500000\0" \
134	"bootk=" \
135	"run loaduimage; bootm 0x40007FC0\0" \
136	"updatemmc=" \
137	"mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
138	"mmc boot 0 1 1 0\0" \
139	"updatebackup=" \
140	"mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
141	"mmc boot 0 1 1 0\0" \
142	"updatebootb=" \
143	"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
144	"lpj=lpj=3981312\0" \
145	"ubifsboot=" \
146	"set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
147	CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
148	CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
149	"tftpboot=" \
150	"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
151	CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
152	CONFIG_ENV_COMMON_BOOT \
153	"; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
154	"nfsboot=" \
155	"set bootargs root=/dev/nfs rw " \
156	"nfsroot=${nfsroot},nolock,tcp " \
157	"ip=${ipaddr}:${serverip}:${gatewayip}:" \
158	"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
159	"; run bootk\0" \
160	"ramfsboot=" \
161	"set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
162	"${console} ${meminfo} " \
163	"initrd=0x43000000,8M ramdisk=8192\0" \
164	"mmcboot=" \
165	"set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
166	"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
167	"run loaduimage; bootm 0x40007FC0\0" \
168	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
169	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
170	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
171	"verify=n\0" \
172	"rootfstype=ext4\0" \
173	"console=" CONFIG_DEFAULT_CONSOLE \
174	"mtdparts=" MTDPARTS_DEFAULT \
175	"mbrparts=" MBRPARTS_DEFAULT \
176	"meminfo=crashkernel=32M@0x50000000\0" \
177	"nfsroot=/nfsroot/arm\0" \
178	"bootblock=" CONFIG_BOOTBLOCK "\0" \
179	"ubiblock=" CONFIG_UBIBLOCK" \0" \
180	"ubi=enabled\0" \
181	"loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
182	"mmcdev=0\0" \
183	"mmcbootpart=2\0" \
184	"mmcrootpart=3\0" \
185	"opts=always_resume=1"
186
187	/* Miscellaneous configurable options */
188	#define CONFIG_SYS_LONGHELP /* undef to save memory */
189	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
9e40808c MK	190	#define CONFIG_SYS_PROMPT "Universal # "
	191	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	192	#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
	193	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	194	/* Boot Argument Buffer Size */
	195	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	196	/* memtest works on */
	197	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	198	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
	199	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
	200
	201	#define CONFIG_SYS_HZ 1000
	202
9e40808c MK	203	/* Universal has 2 banks of DRAM */
	204	#define CONFIG_NR_DRAM_BANKS 2
	205	#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
	206	#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
	207	#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
	208	#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
	209
	210	#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
	211
	212	#define CONFIG_SYS_MONITOR_BASE 0x00000000
	213	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
	214
	215	#define CONFIG_USE_ONENAND_BOARD_INIT
a08a649d	216	#define CONFIG_SAMSUNG_ONENAND
9e40808c MK	217	#define CONFIG_SYS_ONENAND_BASE 0x0C000000
	218
	219	#define CONFIG_ENV_IS_IN_MMC 1
	220	#define CONFIG_SYS_MMC_ENV_DEV 0
	221	#define CONFIG_ENV_SIZE 4096
	222	#define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */
	223
	224	#define CONFIG_DOS_PARTITION 1
	225
	226	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
	227
0aa597d1 ŁM	228	#define CONFIG_SYS_CACHELINE_SIZE 32
0aa597d1 ŁM	229
2427f5d5 ŁM	230	#include <asm/arch/gpio.h>
	231	/*
	232	* I2C Settings
	233	*/
393cb361 CK	234	#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
393cb361 CK	235	#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
2427f5d5 ŁM	236
	237	#define CONFIG_SOFT_I2C
	238	#define CONFIG_SOFT_I2C_READ_REPEATED_START
	239	#define CONFIG_SYS_I2C_SPEED 50000
	240	#define CONFIG_I2C_MULTI_BUS
	241	#define CONFIG_SYS_MAX_I2C_BUS 7
	242
be3b51aa ŁM	243	#define CONFIG_POWER
	244	#define CONFIG_POWER_I2C
	245	#define CONFIG_POWER_MAX8998
2427f5d5	246
ddc7e541 ŁM	247	#define CONFIG_USB_GADGET
	248	#define CONFIG_USB_GADGET_S3C_UDC_OTG
	249	#define CONFIG_USB_GADGET_DUALSPEED
	250
ff0fedd5 PW	251	/*
	252	* SPI Settings
	253	*/
	254	#define CONFIG_SOFT_SPI
	255	#define CONFIG_SOFT_SPI_MODE SPI_MODE_3
	256	#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
	257	#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
	258	#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
	259	#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
	260
	261	#define SPI_DELAY udelay(1)
	262	#undef SPI_INIT
	263	#define SPI_SCL(bit) universal_spi_scl(bit)
	264	#define SPI_SDA(bit) universal_spi_sda(bit)
	265	#define SPI_READ universal_spi_read()
	266	#ifndef __ASSEMBLY__
	267	void universal_spi_scl(int bit);
	268	void universal_spi_sda(int bit);
	269	int universal_spi_read(void);
	270	#endif
	271
d984b9f8 PW	272	/*
	273	* LCD Settings
	274	*/
	275	#define CONFIG_EXYNOS_FB
	276	#define CONFIG_LCD
	277	#define CONFIG_CMD_BMP
	278	#define CONFIG_BMP_32BPP
	279	#define CONFIG_LD9040
	280	#define CONFIG_EXYNOS_MIPI_DSIM
	281	#define CONFIG_VIDEO_BMP_GZIP
	282	#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12))
	283
9e40808c	284	#endif /* __CONFIG_H */