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9989c156 WY |
1 | /* |
2 | * Configuration settings for the SAMA5D2 PTC Engineering board. | |
3 | * | |
4 | * Copyright (C) 2016 Atmel | |
5 | * Wenyou Yang <wenyou.yang@atmel.com> | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
9989c156 WY |
13 | #include "at91-sama5_common.h" |
14 | ||
15 | /* serial console */ | |
16 | #define CONFIG_ATMEL_USART | |
e61ed48f WY |
17 | #define CONFIG_USART_BASE 0xf801c000 |
18 | #define CONFIG_USART_ID 24 | |
9989c156 | 19 | |
e61ed48f | 20 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
9989c156 WY |
21 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
22 | ||
e61ed48f WY |
23 | #define CONFIG_SYS_TIMER_COUNTER 0xf804803c |
24 | ||
9989c156 WY |
25 | #ifdef CONFIG_SPL_BUILD |
26 | #define CONFIG_SYS_INIT_SP_ADDR 0x210000 | |
27 | #else | |
28 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
29 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) | |
30 | #endif | |
31 | ||
32 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
33 | ||
34 | #undef CONFIG_AT91_GPIO | |
35 | #define CONFIG_ATMEL_PIO4 | |
36 | ||
37 | /* SDRAM */ | |
38 | #define CONFIG_NR_DRAM_BANKS 1 | |
39 | ||
40 | /* SerialFlash */ | |
41 | #ifdef CONFIG_CMD_SF | |
42 | #define CONFIG_ATMEL_SPI | |
43 | #define CONFIG_SPI_FLASH_ATMEL | |
44 | #define CONFIG_SF_DEFAULT_BUS 0 | |
45 | #define CONFIG_SF_DEFAULT_CS 0 | |
46 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
47 | #endif | |
48 | ||
49 | /* NAND flash */ | |
9989c156 WY |
50 | #ifdef CONFIG_CMD_NAND |
51 | #define CONFIG_NAND_ATMEL | |
52 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
e61ed48f | 53 | #define CONFIG_SYS_NAND_BASE 0x80000000 |
9989c156 WY |
54 | /* our ALE is AD21 */ |
55 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
56 | /* our CLE is AD22 */ | |
57 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
58 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
59 | /* PMECC & PMERRLOC */ | |
60 | #define CONFIG_ATMEL_NAND_HWECC | |
61 | #define CONFIG_ATMEL_NAND_HW_PMECC | |
9989c156 WY |
62 | #endif |
63 | ||
9989c156 | 64 | /* USB device */ |
9989c156 WY |
65 | #define CONFIG_USB_ETH_RNDIS |
66 | #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC" | |
67 | ||
9989c156 WY |
68 | /* Ethernet Hardware */ |
69 | #define CONFIG_MACB | |
70 | #define CONFIG_RMII | |
71 | #define CONFIG_NET_RETRY_COUNT 20 | |
72 | #define CONFIG_MACB_SEARCH_PHY | |
73 | ||
5541543f | 74 | #ifdef CONFIG_NAND_BOOT |
9989c156 WY |
75 | #undef CONFIG_ENV_OFFSET |
76 | #undef CONFIG_ENV_OFFSET_REDUND | |
77 | #undef CONFIG_BOOTCOMMAND | |
78 | /* u-boot env in nand flash */ | |
9989c156 WY |
79 | #define CONFIG_ENV_OFFSET 0x200000 |
80 | #define CONFIG_ENV_OFFSET_REDUND 0x400000 | |
81 | #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \ | |
82 | "nand read 0x22000000 0x600000 0x600000;" \ | |
83 | "bootz 0x22000000 - 0x21000000" | |
84 | #endif | |
85 | ||
9989c156 WY |
86 | /* SPL */ |
87 | #define CONFIG_SPL_FRAMEWORK | |
88 | #define CONFIG_SPL_TEXT_BASE 0x200000 | |
89 | #define CONFIG_SPL_MAX_SIZE 0x10000 | |
90 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 | |
91 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
92 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
93 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
94 | ||
9989c156 WY |
95 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
96 | ||
5541543f | 97 | #ifdef CONFIG_SPI_BOOT |
9989c156 WY |
98 | #define CONFIG_SPL_SPI_LOAD |
99 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 | |
100 | ||
5541543f | 101 | #elif CONFIG_NAND_BOOT |
9989c156 WY |
102 | #define CONFIG_SPL_NAND_DRIVERS |
103 | #define CONFIG_SPL_NAND_BASE | |
5541543f | 104 | #endif |
9989c156 WY |
105 | #define CONFIG_PMECC_CAP 8 |
106 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
107 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 | |
108 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
109 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 | |
110 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
111 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
112 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 | |
113 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 | |
114 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER | |
9989c156 WY |
115 | |
116 | #endif |