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flash: complete CONFIG_SYS_NO_FLASH move with renaming
[people/ms/u-boot.git] / include / configs / sama5d3_xplained.h
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1/*
2 * Configuration settings for the SAMA5D3 Xplained board.
3 *
4 * Copyright (C) 2014 Atmel Corporation
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
b2d387bc 13#include "at91-sama5_common.h"
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14
15/* serial console */
16#define CONFIG_ATMEL_USART
17#define CONFIG_USART_BASE ATMEL_BASE_DBGU
18#define CONFIG_USART_ID ATMEL_ID_DBGU
19
20/*
21 * This needs to be defined for the OHCI code to work but it is defined as
22 * ATMEL_ID_UHPHS in the CPU specific header files.
23 */
24#define ATMEL_ID_UHP ATMEL_ID_UHPHS
25
26/*
27 * Specify the clock enable bit in the PMC_SCER register.
28 */
29#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
30
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31/* SDRAM */
32#define CONFIG_NR_DRAM_BANKS 1
33#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
34#define CONFIG_SYS_SDRAM_SIZE 0x10000000
35
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36#ifdef CONFIG_SPL_BUILD
37#define CONFIG_SYS_INIT_SP_ADDR 0x310000
38#else
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39#define CONFIG_SYS_INIT_SP_ADDR \
40 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
cd23aac4 41#endif
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42
43/* NAND flash */
44#define CONFIG_CMD_NAND
45
46#ifdef CONFIG_CMD_NAND
47#define CONFIG_NAND_ATMEL
48#define CONFIG_SYS_MAX_NAND_DEVICE 1
49#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
50/* our ALE is AD21 */
51#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
52/* our CLE is AD22 */
53#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
54#define CONFIG_SYS_NAND_ONFI_DETECTION
55/* PMECC & PMERRLOC */
56#define CONFIG_ATMEL_NAND_HWECC
57#define CONFIG_ATMEL_NAND_HW_PMECC
58#define CONFIG_PMECC_CAP 4
59#define CONFIG_PMECC_SECTOR_SIZE 512
60#define CONFIG_CMD_NAND_TRIMFFS
61#define CONFIG_CMD_MTDPARTS
62
63#define CONFIG_MTD_DEVICE
64#define CONFIG_MTD_PARTITIONS
65#define CONFIG_RBTREE
66#define CONFIG_LZO
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67#define CONFIG_CMD_UBIFS
68#endif
69
70/* Ethernet Hardware */
71#define CONFIG_MACB
72#define CONFIG_RMII
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73#define CONFIG_NET_RETRY_COUNT 20
74#define CONFIG_MACB_SEARCH_PHY
75#define CONFIG_RGMII
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76#define CONFIG_PHYLIB
77
78/* MMC */
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79
80#ifdef CONFIG_CMD_MMC
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81#define CONFIG_GENERIC_ATMEL_MCI
82#define CONFIG_ATMEL_MCI_8BIT
83#endif
84
85/* USB */
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86
87#ifdef CONFIG_CMD_USB
88#define CONFIG_USB_ATMEL
89#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
90#define CONFIG_USB_OHCI_NEW
91#define CONFIG_SYS_USB_OHCI_CPU_INIT
92#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
93#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
94#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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95#endif
96
97#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
7ca6f363 98#define CONFIG_FAT_WRITE
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99#endif
100
101#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
102
103#if CONFIG_SYS_USE_NANDFLASH
dc018fef 104/* override the bootcmd, bootargs and other configuration for nandflash env */
7ca6f363 105#elif CONFIG_SYS_USE_MMC
372ca03f 106/* override the bootcmd, bootargs and other configuration for sd/mmc env */
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107#else
108#define CONFIG_ENV_IS_NOWHERE
109#endif
110
cd23aac4 111/* SPL */
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112#define CONFIG_SPL_FRAMEWORK
113#define CONFIG_SPL_TEXT_BASE 0x300000
114#define CONFIG_SPL_MAX_SIZE 0x10000
115#define CONFIG_SPL_BSS_START_ADDR 0x20000000
116#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
117#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
118#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
119
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120#define CONFIG_SPL_BOARD_INIT
121#define CONFIG_SYS_MONITOR_LEN (512 << 10)
122
123#ifdef CONFIG_SYS_USE_MMC
993ea97e 124#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
e2ccdf89 125#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
205b4f33 126#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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127
128#elif CONFIG_SYS_USE_NANDFLASH
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129#define CONFIG_SPL_NAND_DRIVERS
130#define CONFIG_SPL_NAND_BASE
131#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
132#define CONFIG_SYS_NAND_5_ADDR_CYCLE
133#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
134#define CONFIG_SYS_NAND_PAGE_COUNT 64
135#define CONFIG_SYS_NAND_OOBSIZE 64
136#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
137#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
05a4d544 138#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
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139
140#endif
141
7ca6f363 142#endif