]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/sandbox.h
mx53: Add Board support for GE PPD
[people/ms/u-boot.git] / include / configs / sandbox.h
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c861fbf7
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
c861fbf7
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4 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
e2ee100f
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9#ifdef FTRACE
10#define CONFIG_TRACE
e2ee100f
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11#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
12#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
13#define CONFIG_TRACE_EARLY
14#define CONFIG_TRACE_EARLY_ADDR 0x00100000
15
16#endif
17
1c12bcee 18#ifndef CONFIG_SPL_BUILD
42d3b29d 19#define CONFIG_IO_TRACE
1c12bcee 20#endif
42d3b29d 21
9961a0b6 22#ifndef CONFIG_TIMER
28c860b2 23#define CONFIG_SYS_TIMER_RATE 1000000
9961a0b6 24#endif
28c860b2 25
7b06b66c
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26#define CONFIG_LMB
27
10fc1218
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28#define CONFIG_FS_EXT4
29#define CONFIG_EXT4_WRITE
f4d8de48 30#define CONFIG_HOST_MAX_DEVICES 4
10fc1218 31
c861fbf7 32/*
b53e94b1 33 * Size of malloc() pool, before and after relocation
c861fbf7 34 */
b53e94b1 35#define CONFIG_MALLOC_F_ADDR 0x0010000
9f604425 36#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
c861fbf7 37
c861fbf7
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38#define CONFIG_SYS_LONGHELP /* #undef to save memory */
39#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
d63b5b4f 40#define CONFIG_DISPLAY_BOARDINFO_LATE
c861fbf7 41
c861fbf7
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42/* turn on command-line edit/c/auto */
43#define CONFIG_CMDLINE_EDITING
ed0fc4b1 44#define CONFIG_AUTO_COMPLETE
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45
46#define CONFIG_ENV_SIZE 8192
c861fbf7 47
5e74934d 48/* SPI - enable all SPI flash types for testing purposes */
ca9a5019 49
ac395f08 50#define CONFIG_I2C_EDID
ac395f08 51
c861fbf7 52/* Memory things - we don't really want a memory test */
ecdbf419
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53#define CONFIG_SYS_LOAD_ADDR 0x00000000
54#define CONFIG_SYS_MEMTEST_START 0x00100000
c861fbf7 55#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000)
2c072c95
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56#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
57
58#define CONFIG_PHYSMEM
c861fbf7
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59
60/* Size of our emulated memory */
a733b06b 61#define CONFIG_SYS_SDRAM_BASE 0
c861fbf7 62#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
a733b06b
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63#define CONFIG_SYS_TEXT_BASE 0
64#define CONFIG_SYS_MONITOR_BASE 0
65#define CONFIG_NR_DRAM_BANKS 1
c861fbf7 66
c861fbf7
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67#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
68 115200}
c861fbf7 69
c861fbf7 70/* include default commands */
791a9f67
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71#include <config_distro_defaults.h>
72
73#define BOOT_TARGET_DEVICES(func) \
74 func(HOST, host, 1) \
75 func(HOST, host, 0)
76
ebaa832e
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77#define CONFIG_BOOTCOMMAND ""
78
791a9f67 79#include <config_distro_bootcmd.h>
c861fbf7 80
1f5bc524
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81#define CONFIG_KEEP_SERVERADDR
82#define CONFIG_UDP_CHECKSUM
1f5bc524 83#define CONFIG_TIMESTAMP
f3e0c374
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84#define CONFIG_BOOTP_DNS
85#define CONFIG_BOOTP_DNS2
f3e0c374
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86#define CONFIG_BOOTP_SEND_HOSTNAME
87#define CONFIG_BOOTP_SERVERIP
f3e0c374 88#define CONFIG_IP_DEFRAG
c861fbf7 89
ad0e4639 90#ifndef SANDBOX_NO_SDL
2c072c95 91#define CONFIG_SANDBOX_SDL
ad0e4639
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92#endif
93
94/* LCD and keyboard require SDL support */
95#ifdef CONFIG_SANDBOX_SDL
2c072c95 96#define LCD_BPP LCD_COLOR16
0156444c 97#define CONFIG_LCD_BMP_RLE8
747440d0
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98#define CONFIG_VIDEO_BMP_RLE8
99#define CONFIG_SPLASH_SCREEN_ALIGN
2c072c95 100
ad0e4639
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101#define CONFIG_KEYBOARD
102
460a7172 103#define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
f1a1247d
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104 "stdout=serial,vidconsole\0" \
105 "stderr=serial,vidconsole\0"
ad0e4639 106#else
3ea143ab 107#define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
f1a1247d
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108 "stdout=serial,vidconsole\0" \
109 "stderr=serial,vidconsole\0"
ad0e4639 110#endif
c861fbf7 111
3ea143ab
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112#define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
113 "eth1addr=00:00:11:22:33:45\0" \
71d7971f
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114 "eth3addr=00:00:11:22:33:46\0" \
115 "eth5addr=00:00:11:22:33:47\0" \
3ea143ab
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116 "ipaddr=1.2.3.4\0"
117
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118#define MEM_LAYOUT_ENV_SETTINGS \
119 "bootm_size=0x10000000\0" \
120 "kernel_addr_r=0x1000000\0" \
121 "fdt_addr_r=0xc00000\0" \
122 "ramdisk_addr_r=0x2000000\0" \
123 "scriptaddr=0x1000\0" \
124 "pxefile_addr_r=0x2000\0"
125
126#define CONFIG_EXTRA_ENV_SETTINGS \
127 SANDBOX_SERIAL_SETTINGS \
128 SANDBOX_ETH_SETTINGS \
129 BOOTENV \
130 MEM_LAYOUT_ENV_SETTINGS
3ea143ab 131
3153e915
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132#define CONFIG_GZIP_COMPRESSED
133#define CONFIG_BZIP2
3153e915 134
1c12bcee 135#ifndef CONFIG_SPL_BUILD
74c6dc14
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136#define CONFIG_SYS_IDE_MAXBUS 1
137#define CONFIG_SYS_ATA_IDE0_OFFSET 0
138#define CONFIG_SYS_IDE_MAXDEVICE 2
139#define CONFIG_SYS_ATA_BASE_ADDR 0x100
140#define CONFIG_SYS_ATA_DATA_OFFSET 0
141#define CONFIG_SYS_ATA_REG_OFFSET 1
142#define CONFIG_SYS_ATA_ALT_OFFSET 2
143#define CONFIG_SYS_ATA_STRIDE 4
1c12bcee 144#endif
74c6dc14 145
e8c0a250
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146#define CONFIG_SCSI_AHCI_PLAT
147#define CONFIG_SYS_SCSI_MAX_DEVICE 2
148#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
149#define CONFIG_SYS_SCSI_MAX_LUN 4
150
199a1201
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151#define CONFIG_SYS_SATA_MAX_DEVICE 2
152
cd995a8a
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153#define CONFIG_SYSTEMACE
154#define CONFIG_SYS_SYSTEMACE_WIDTH 16
155#define CONFIG_SYS_SYSTEMACE_BASE 0
156
68969778
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157#define CONFIG_MISC_INIT_F
158
c861fbf7 159#endif