]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/sandbox.h
config: Move CONFIG_BOARD_LATE_INIT to defconfigs
[people/ms/u-boot.git] / include / configs / sandbox.h
CommitLineData
c861fbf7
SG
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
c861fbf7
SG
4 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
e2ee100f
SG
9#ifdef FTRACE
10#define CONFIG_TRACE
11#define CONFIG_CMD_TRACE
12#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
13#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
14#define CONFIG_TRACE_EARLY
15#define CONFIG_TRACE_EARLY_ADDR 0x00100000
16
17#endif
18
1c12bcee 19#ifndef CONFIG_SPL_BUILD
42d3b29d
SG
20#define CONFIG_IO_TRACE
21#define CONFIG_CMD_IOTRACE
1c12bcee 22#endif
42d3b29d 23
9961a0b6 24#ifndef CONFIG_TIMER
28c860b2 25#define CONFIG_SYS_TIMER_RATE 1000000
9961a0b6 26#endif
28c860b2 27
5923c843
SG
28/*
29 * Number of bits in a C 'long' on this architecture. Set this to 32 when
30 * building on a 32-bit machine.
31 */
c861fbf7
SG
32#define CONFIG_SANDBOX_BITS_PER_LONG 64
33
7b06b66c 34#define CONFIG_LMB
07c0cd71 35#define CONFIG_ANDROID_BOOT_IMAGE
7b06b66c 36
a33aca10 37#define CONFIG_CMD_PCI
a33aca10
SG
38#define CONFIG_CMD_IO
39
10fc1218 40#define CONFIG_FS_FAT
79444955 41#define CONFIG_FAT_WRITE
10fc1218
SG
42#define CONFIG_FS_EXT4
43#define CONFIG_EXT4_WRITE
782b9780
SG
44#define CONFIG_CMD_CBFS
45#define CONFIG_CMD_CRAMFS
f4d8de48
HN
46#define CONFIG_CMD_PART
47#define CONFIG_DOS_PARTITION
48#define CONFIG_HOST_MAX_DEVICES 4
79444955 49#define CONFIG_CMD_MD5SUM
10fc1218 50
5d62314c
EE
51#define CONFIG_CMD_GPT
52#define CONFIG_PARTITION_UUIDS
14142811 53#define CONFIG_AMIGA_PARTITION
aacef256 54#define CONFIG_DOS_PARTITION
14142811
SG
55#define CONFIG_EFI_PARTITION
56#define CONFIG_ISO_PARTITION
57#define CONFIG_MAC_PARTITION
5d62314c 58
c861fbf7 59/*
b53e94b1 60 * Size of malloc() pool, before and after relocation
c861fbf7 61 */
b53e94b1 62#define CONFIG_MALLOC_F_ADDR 0x0010000
9f604425 63#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
c861fbf7 64
c861fbf7
SG
65#define CONFIG_SYS_LONGHELP /* #undef to save memory */
66#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
67
68/* Print Buffer Size */
69#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
70#define CONFIG_SYS_MAXARGS 16
71
72/* turn on command-line edit/c/auto */
73#define CONFIG_CMDLINE_EDITING
74#define CONFIG_COMMAND_HISTORY
ed0fc4b1 75#define CONFIG_AUTO_COMPLETE
c861fbf7
SG
76
77#define CONFIG_ENV_SIZE 8192
78#define CONFIG_ENV_IS_NOWHERE
79
5e74934d 80/* SPI - enable all SPI flash types for testing purposes */
ca9a5019 81#define CONFIG_CMD_SF_TEST
ca9a5019 82
ac395f08 83#define CONFIG_I2C_EDID
ac395f08 84
c861fbf7 85/* Memory things - we don't really want a memory test */
ecdbf419
SG
86#define CONFIG_SYS_LOAD_ADDR 0x00000000
87#define CONFIG_SYS_MEMTEST_START 0x00100000
c861fbf7 88#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000)
2c072c95
SG
89#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
90
91#define CONFIG_PHYSMEM
c861fbf7
SG
92
93/* Size of our emulated memory */
a733b06b 94#define CONFIG_SYS_SDRAM_BASE 0
c861fbf7 95#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
a733b06b
SG
96#define CONFIG_SYS_TEXT_BASE 0
97#define CONFIG_SYS_MONITOR_BASE 0
98#define CONFIG_NR_DRAM_BANKS 1
c861fbf7
SG
99
100#define CONFIG_BAUDRATE 115200
101#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
102 115200}
c861fbf7
SG
103
104#define CONFIG_SYS_NO_FLASH
105
106/* include default commands */
791a9f67
SS
107#include <config_distro_defaults.h>
108
109#define BOOT_TARGET_DEVICES(func) \
110 func(HOST, host, 1) \
111 func(HOST, host, 0)
112
ebaa832e
SS
113#define CONFIG_BOOTCOMMAND ""
114
791a9f67 115#include <config_distro_bootcmd.h>
c861fbf7 116
1f5bc524
JH
117#define CONFIG_KEEP_SERVERADDR
118#define CONFIG_UDP_CHECKSUM
1f5bc524 119#define CONFIG_TIMESTAMP
f3e0c374
JH
120#define CONFIG_BOOTP_DNS
121#define CONFIG_BOOTP_DNS2
f3e0c374
JH
122#define CONFIG_BOOTP_SEND_HOSTNAME
123#define CONFIG_BOOTP_SERVERIP
f3e0c374 124#define CONFIG_IP_DEFRAG
c861fbf7 125
791a9f67 126/* Can't boot elf images */
791a9f67 127
ecdbf419
SG
128#define CONFIG_CMD_HASH
129#define CONFIG_HASH_VERIFY
130#define CONFIG_SHA1
131#define CONFIG_SHA256
132
e40753b2
SG
133#define CONFIG_CMD_SANDBOX
134
7acdf781
JH
135#define CONFIG_CMD_ENV_FLAGS
136#define CONFIG_CMD_ENV_CALLBACK
7acdf781 137
c861fbf7
SG
138#define CONFIG_BOOTARGS ""
139
ad0e4639 140#ifndef SANDBOX_NO_SDL
2c072c95 141#define CONFIG_SANDBOX_SDL
ad0e4639
SG
142#endif
143
144/* LCD and keyboard require SDL support */
145#ifdef CONFIG_SANDBOX_SDL
2c072c95 146#define CONFIG_CMD_BMP
2c072c95 147#define LCD_BPP LCD_COLOR16
0156444c 148#define CONFIG_LCD_BMP_RLE8
747440d0
SG
149#define CONFIG_VIDEO_BMP_RLE8
150#define CONFIG_SPLASH_SCREEN_ALIGN
2c072c95 151
ad0e4639
SG
152#define CONFIG_KEYBOARD
153
460a7172 154#define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
f1a1247d
SG
155 "stdout=serial,vidconsole\0" \
156 "stderr=serial,vidconsole\0"
ad0e4639 157#else
3ea143ab 158#define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
f1a1247d
SG
159 "stdout=serial,vidconsole\0" \
160 "stderr=serial,vidconsole\0"
ad0e4639 161#endif
c861fbf7 162
3ea143ab
JH
163#define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
164 "eth1addr=00:00:11:22:33:45\0" \
71d7971f
BM
165 "eth3addr=00:00:11:22:33:46\0" \
166 "eth5addr=00:00:11:22:33:47\0" \
3ea143ab
JH
167 "ipaddr=1.2.3.4\0"
168
791a9f67
SS
169#define MEM_LAYOUT_ENV_SETTINGS \
170 "bootm_size=0x10000000\0" \
171 "kernel_addr_r=0x1000000\0" \
172 "fdt_addr_r=0xc00000\0" \
173 "ramdisk_addr_r=0x2000000\0" \
174 "scriptaddr=0x1000\0" \
175 "pxefile_addr_r=0x2000\0"
176
177#define CONFIG_EXTRA_ENV_SETTINGS \
178 SANDBOX_SERIAL_SETTINGS \
179 SANDBOX_ETH_SETTINGS \
180 BOOTENV \
181 MEM_LAYOUT_ENV_SETTINGS
3ea143ab 182
3153e915
KC
183#define CONFIG_GZIP_COMPRESSED
184#define CONFIG_BZIP2
185#define CONFIG_LZO
186#define CONFIG_LZMA
187
def23217 188#define CONFIG_CMD_LZMADEC
8e7083fc 189#define CONFIG_CMD_DATE
def23217 190
1c12bcee 191#ifndef CONFIG_SPL_BUILD
74c6dc14
SG
192#define CONFIG_CMD_IDE
193#define CONFIG_SYS_IDE_MAXBUS 1
194#define CONFIG_SYS_ATA_IDE0_OFFSET 0
195#define CONFIG_SYS_IDE_MAXDEVICE 2
196#define CONFIG_SYS_ATA_BASE_ADDR 0x100
197#define CONFIG_SYS_ATA_DATA_OFFSET 0
198#define CONFIG_SYS_ATA_REG_OFFSET 1
199#define CONFIG_SYS_ATA_ALT_OFFSET 2
200#define CONFIG_SYS_ATA_STRIDE 4
1c12bcee 201#endif
74c6dc14 202
e8c0a250
SG
203#define CONFIG_SCSI
204#define CONFIG_SCSI_AHCI_PLAT
205#define CONFIG_SYS_SCSI_MAX_DEVICE 2
206#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
207#define CONFIG_SYS_SCSI_MAX_LUN 4
208
199a1201
SG
209#define CONFIG_CMD_SATA
210#define CONFIG_SYS_SATA_MAX_DEVICE 2
211
cd995a8a
SG
212#define CONFIG_SYSTEMACE
213#define CONFIG_SYS_SYSTEMACE_WIDTH 16
214#define CONFIG_SYS_SYSTEMACE_BASE 0
215
afa2c312
SG
216#define CONFIG_GENERIC_MMC
217
c861fbf7 218#endif