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include/configs: drop default definitions of CONFIG_SYS_PBSIZE
[people/ms/u-boot.git] / include / configs / sandbox.h
CommitLineData
c861fbf7
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
c861fbf7
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4 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
e2ee100f
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9#ifdef FTRACE
10#define CONFIG_TRACE
e2ee100f
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11#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
12#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
13#define CONFIG_TRACE_EARLY
14#define CONFIG_TRACE_EARLY_ADDR 0x00100000
15
16#endif
17
1c12bcee 18#ifndef CONFIG_SPL_BUILD
42d3b29d 19#define CONFIG_IO_TRACE
1c12bcee 20#endif
42d3b29d 21
9961a0b6 22#ifndef CONFIG_TIMER
28c860b2 23#define CONFIG_SYS_TIMER_RATE 1000000
9961a0b6 24#endif
28c860b2 25
7b06b66c
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26#define CONFIG_LMB
27
10fc1218
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28#define CONFIG_FS_EXT4
29#define CONFIG_EXT4_WRITE
f4d8de48 30#define CONFIG_HOST_MAX_DEVICES 4
10fc1218 31
c861fbf7 32/*
b53e94b1 33 * Size of malloc() pool, before and after relocation
c861fbf7 34 */
b53e94b1 35#define CONFIG_MALLOC_F_ADDR 0x0010000
9f604425 36#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
c861fbf7 37
c861fbf7
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38#define CONFIG_SYS_LONGHELP /* #undef to save memory */
39#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
d63b5b4f 40#define CONFIG_DISPLAY_BOARDINFO_LATE
c861fbf7 41
c861fbf7
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42#define CONFIG_SYS_MAXARGS 16
43
44/* turn on command-line edit/c/auto */
45#define CONFIG_CMDLINE_EDITING
ed0fc4b1 46#define CONFIG_AUTO_COMPLETE
c861fbf7
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47
48#define CONFIG_ENV_SIZE 8192
c861fbf7 49
5e74934d 50/* SPI - enable all SPI flash types for testing purposes */
ca9a5019 51
ac395f08 52#define CONFIG_I2C_EDID
ac395f08 53
c861fbf7 54/* Memory things - we don't really want a memory test */
ecdbf419
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55#define CONFIG_SYS_LOAD_ADDR 0x00000000
56#define CONFIG_SYS_MEMTEST_START 0x00100000
c861fbf7 57#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000)
2c072c95
SG
58#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
59
60#define CONFIG_PHYSMEM
c861fbf7
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61
62/* Size of our emulated memory */
a733b06b 63#define CONFIG_SYS_SDRAM_BASE 0
c861fbf7 64#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
a733b06b
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65#define CONFIG_SYS_TEXT_BASE 0
66#define CONFIG_SYS_MONITOR_BASE 0
67#define CONFIG_NR_DRAM_BANKS 1
c861fbf7 68
c861fbf7
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69#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
70 115200}
c861fbf7 71
c861fbf7 72/* include default commands */
791a9f67
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73#include <config_distro_defaults.h>
74
75#define BOOT_TARGET_DEVICES(func) \
76 func(HOST, host, 1) \
77 func(HOST, host, 0)
78
ebaa832e
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79#define CONFIG_BOOTCOMMAND ""
80
791a9f67 81#include <config_distro_bootcmd.h>
c861fbf7 82
1f5bc524
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83#define CONFIG_KEEP_SERVERADDR
84#define CONFIG_UDP_CHECKSUM
1f5bc524 85#define CONFIG_TIMESTAMP
f3e0c374
JH
86#define CONFIG_BOOTP_DNS
87#define CONFIG_BOOTP_DNS2
f3e0c374
JH
88#define CONFIG_BOOTP_SEND_HOSTNAME
89#define CONFIG_BOOTP_SERVERIP
f3e0c374 90#define CONFIG_IP_DEFRAG
c861fbf7 91
ad0e4639 92#ifndef SANDBOX_NO_SDL
2c072c95 93#define CONFIG_SANDBOX_SDL
ad0e4639
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94#endif
95
96/* LCD and keyboard require SDL support */
97#ifdef CONFIG_SANDBOX_SDL
2c072c95 98#define LCD_BPP LCD_COLOR16
0156444c 99#define CONFIG_LCD_BMP_RLE8
747440d0
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100#define CONFIG_VIDEO_BMP_RLE8
101#define CONFIG_SPLASH_SCREEN_ALIGN
2c072c95 102
ad0e4639
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103#define CONFIG_KEYBOARD
104
460a7172 105#define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
f1a1247d
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106 "stdout=serial,vidconsole\0" \
107 "stderr=serial,vidconsole\0"
ad0e4639 108#else
3ea143ab 109#define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
f1a1247d
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110 "stdout=serial,vidconsole\0" \
111 "stderr=serial,vidconsole\0"
ad0e4639 112#endif
c861fbf7 113
3ea143ab
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114#define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
115 "eth1addr=00:00:11:22:33:45\0" \
71d7971f
BM
116 "eth3addr=00:00:11:22:33:46\0" \
117 "eth5addr=00:00:11:22:33:47\0" \
3ea143ab
JH
118 "ipaddr=1.2.3.4\0"
119
791a9f67
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120#define MEM_LAYOUT_ENV_SETTINGS \
121 "bootm_size=0x10000000\0" \
122 "kernel_addr_r=0x1000000\0" \
123 "fdt_addr_r=0xc00000\0" \
124 "ramdisk_addr_r=0x2000000\0" \
125 "scriptaddr=0x1000\0" \
126 "pxefile_addr_r=0x2000\0"
127
128#define CONFIG_EXTRA_ENV_SETTINGS \
129 SANDBOX_SERIAL_SETTINGS \
130 SANDBOX_ETH_SETTINGS \
131 BOOTENV \
132 MEM_LAYOUT_ENV_SETTINGS
3ea143ab 133
3153e915
KC
134#define CONFIG_GZIP_COMPRESSED
135#define CONFIG_BZIP2
3153e915 136
1c12bcee 137#ifndef CONFIG_SPL_BUILD
74c6dc14
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138#define CONFIG_SYS_IDE_MAXBUS 1
139#define CONFIG_SYS_ATA_IDE0_OFFSET 0
140#define CONFIG_SYS_IDE_MAXDEVICE 2
141#define CONFIG_SYS_ATA_BASE_ADDR 0x100
142#define CONFIG_SYS_ATA_DATA_OFFSET 0
143#define CONFIG_SYS_ATA_REG_OFFSET 1
144#define CONFIG_SYS_ATA_ALT_OFFSET 2
145#define CONFIG_SYS_ATA_STRIDE 4
1c12bcee 146#endif
74c6dc14 147
e8c0a250
SG
148#define CONFIG_SCSI_AHCI_PLAT
149#define CONFIG_SYS_SCSI_MAX_DEVICE 2
150#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
151#define CONFIG_SYS_SCSI_MAX_LUN 4
152
199a1201
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153#define CONFIG_SYS_SATA_MAX_DEVICE 2
154
cd995a8a
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155#define CONFIG_SYSTEMACE
156#define CONFIG_SYS_SYSTEMACE_WIDTH 16
157#define CONFIG_SYS_SYSTEMACE_BASE 0
158
68969778
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159#define CONFIG_MISC_INIT_F
160
c861fbf7 161#endif