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Commit | Line | Data |
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c861fbf7 SG |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
1a459660 | 3 | * SPDX-License-Identifier: GPL-2.0+ |
c861fbf7 SG |
4 | */ |
5 | ||
6 | #ifndef __CONFIG_H | |
7 | #define __CONFIG_H | |
8 | ||
e2ee100f SG |
9 | #ifdef FTRACE |
10 | #define CONFIG_TRACE | |
11 | #define CONFIG_CMD_TRACE | |
12 | #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) | |
13 | #define CONFIG_TRACE_EARLY_SIZE (8 << 20) | |
14 | #define CONFIG_TRACE_EARLY | |
15 | #define CONFIG_TRACE_EARLY_ADDR 0x00100000 | |
16 | ||
17 | #endif | |
18 | ||
1c12bcee | 19 | #ifndef CONFIG_SPL_BUILD |
42d3b29d | 20 | #define CONFIG_IO_TRACE |
1c12bcee | 21 | #endif |
42d3b29d | 22 | |
9961a0b6 | 23 | #ifndef CONFIG_TIMER |
28c860b2 | 24 | #define CONFIG_SYS_TIMER_RATE 1000000 |
9961a0b6 | 25 | #endif |
28c860b2 | 26 | |
7b06b66c | 27 | #define CONFIG_LMB |
07c0cd71 | 28 | #define CONFIG_ANDROID_BOOT_IMAGE |
7b06b66c | 29 | |
a33aca10 | 30 | #define CONFIG_CMD_PCI |
a33aca10 | 31 | |
10fc1218 SG |
32 | #define CONFIG_FS_EXT4 |
33 | #define CONFIG_EXT4_WRITE | |
f4d8de48 | 34 | #define CONFIG_HOST_MAX_DEVICES 4 |
10fc1218 | 35 | |
c861fbf7 | 36 | /* |
b53e94b1 | 37 | * Size of malloc() pool, before and after relocation |
c861fbf7 | 38 | */ |
b53e94b1 | 39 | #define CONFIG_MALLOC_F_ADDR 0x0010000 |
9f604425 | 40 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ |
c861fbf7 | 41 | |
c861fbf7 SG |
42 | #define CONFIG_SYS_LONGHELP /* #undef to save memory */ |
43 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
d63b5b4f | 44 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
c861fbf7 SG |
45 | |
46 | /* Print Buffer Size */ | |
47 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
48 | #define CONFIG_SYS_MAXARGS 16 | |
49 | ||
50 | /* turn on command-line edit/c/auto */ | |
51 | #define CONFIG_CMDLINE_EDITING | |
ed0fc4b1 | 52 | #define CONFIG_AUTO_COMPLETE |
c861fbf7 SG |
53 | |
54 | #define CONFIG_ENV_SIZE 8192 | |
55 | #define CONFIG_ENV_IS_NOWHERE | |
56 | ||
5e74934d | 57 | /* SPI - enable all SPI flash types for testing purposes */ |
ca9a5019 | 58 | #define CONFIG_CMD_SF_TEST |
ca9a5019 | 59 | |
ac395f08 | 60 | #define CONFIG_I2C_EDID |
ac395f08 | 61 | |
c861fbf7 | 62 | /* Memory things - we don't really want a memory test */ |
ecdbf419 SG |
63 | #define CONFIG_SYS_LOAD_ADDR 0x00000000 |
64 | #define CONFIG_SYS_MEMTEST_START 0x00100000 | |
c861fbf7 | 65 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) |
2c072c95 SG |
66 | #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 |
67 | ||
68 | #define CONFIG_PHYSMEM | |
c861fbf7 SG |
69 | |
70 | /* Size of our emulated memory */ | |
a733b06b | 71 | #define CONFIG_SYS_SDRAM_BASE 0 |
c861fbf7 | 72 | #define CONFIG_SYS_SDRAM_SIZE (128 << 20) |
a733b06b SG |
73 | #define CONFIG_SYS_TEXT_BASE 0 |
74 | #define CONFIG_SYS_MONITOR_BASE 0 | |
75 | #define CONFIG_NR_DRAM_BANKS 1 | |
c861fbf7 | 76 | |
c861fbf7 SG |
77 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
78 | 115200} | |
c861fbf7 | 79 | |
c861fbf7 | 80 | /* include default commands */ |
791a9f67 SS |
81 | #include <config_distro_defaults.h> |
82 | ||
83 | #define BOOT_TARGET_DEVICES(func) \ | |
84 | func(HOST, host, 1) \ | |
85 | func(HOST, host, 0) | |
86 | ||
ebaa832e SS |
87 | #define CONFIG_BOOTCOMMAND "" |
88 | ||
791a9f67 | 89 | #include <config_distro_bootcmd.h> |
c861fbf7 | 90 | |
1f5bc524 JH |
91 | #define CONFIG_KEEP_SERVERADDR |
92 | #define CONFIG_UDP_CHECKSUM | |
1f5bc524 | 93 | #define CONFIG_TIMESTAMP |
f3e0c374 JH |
94 | #define CONFIG_BOOTP_DNS |
95 | #define CONFIG_BOOTP_DNS2 | |
f3e0c374 JH |
96 | #define CONFIG_BOOTP_SEND_HOSTNAME |
97 | #define CONFIG_BOOTP_SERVERIP | |
f3e0c374 | 98 | #define CONFIG_IP_DEFRAG |
c861fbf7 | 99 | |
e40753b2 SG |
100 | #define CONFIG_CMD_SANDBOX |
101 | ||
c861fbf7 SG |
102 | #define CONFIG_BOOTARGS "" |
103 | ||
ad0e4639 | 104 | #ifndef SANDBOX_NO_SDL |
2c072c95 | 105 | #define CONFIG_SANDBOX_SDL |
ad0e4639 SG |
106 | #endif |
107 | ||
108 | /* LCD and keyboard require SDL support */ | |
109 | #ifdef CONFIG_SANDBOX_SDL | |
2c072c95 | 110 | #define LCD_BPP LCD_COLOR16 |
0156444c | 111 | #define CONFIG_LCD_BMP_RLE8 |
747440d0 SG |
112 | #define CONFIG_VIDEO_BMP_RLE8 |
113 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
2c072c95 | 114 | |
ad0e4639 SG |
115 | #define CONFIG_KEYBOARD |
116 | ||
460a7172 | 117 | #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ |
f1a1247d SG |
118 | "stdout=serial,vidconsole\0" \ |
119 | "stderr=serial,vidconsole\0" | |
ad0e4639 | 120 | #else |
3ea143ab | 121 | #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ |
f1a1247d SG |
122 | "stdout=serial,vidconsole\0" \ |
123 | "stderr=serial,vidconsole\0" | |
ad0e4639 | 124 | #endif |
c861fbf7 | 125 | |
3ea143ab JH |
126 | #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ |
127 | "eth1addr=00:00:11:22:33:45\0" \ | |
71d7971f BM |
128 | "eth3addr=00:00:11:22:33:46\0" \ |
129 | "eth5addr=00:00:11:22:33:47\0" \ | |
3ea143ab JH |
130 | "ipaddr=1.2.3.4\0" |
131 | ||
791a9f67 SS |
132 | #define MEM_LAYOUT_ENV_SETTINGS \ |
133 | "bootm_size=0x10000000\0" \ | |
134 | "kernel_addr_r=0x1000000\0" \ | |
135 | "fdt_addr_r=0xc00000\0" \ | |
136 | "ramdisk_addr_r=0x2000000\0" \ | |
137 | "scriptaddr=0x1000\0" \ | |
138 | "pxefile_addr_r=0x2000\0" | |
139 | ||
140 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
141 | SANDBOX_SERIAL_SETTINGS \ | |
142 | SANDBOX_ETH_SETTINGS \ | |
143 | BOOTENV \ | |
144 | MEM_LAYOUT_ENV_SETTINGS | |
3ea143ab | 145 | |
3153e915 KC |
146 | #define CONFIG_GZIP_COMPRESSED |
147 | #define CONFIG_BZIP2 | |
3153e915 | 148 | |
1c12bcee | 149 | #ifndef CONFIG_SPL_BUILD |
74c6dc14 SG |
150 | #define CONFIG_SYS_IDE_MAXBUS 1 |
151 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0 | |
152 | #define CONFIG_SYS_IDE_MAXDEVICE 2 | |
153 | #define CONFIG_SYS_ATA_BASE_ADDR 0x100 | |
154 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 | |
155 | #define CONFIG_SYS_ATA_REG_OFFSET 1 | |
156 | #define CONFIG_SYS_ATA_ALT_OFFSET 2 | |
157 | #define CONFIG_SYS_ATA_STRIDE 4 | |
1c12bcee | 158 | #endif |
74c6dc14 | 159 | |
e8c0a250 SG |
160 | #define CONFIG_SCSI_AHCI_PLAT |
161 | #define CONFIG_SYS_SCSI_MAX_DEVICE 2 | |
162 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 | |
163 | #define CONFIG_SYS_SCSI_MAX_LUN 4 | |
164 | ||
199a1201 SG |
165 | #define CONFIG_SYS_SATA_MAX_DEVICE 2 |
166 | ||
cd995a8a SG |
167 | #define CONFIG_SYSTEMACE |
168 | #define CONFIG_SYS_SYSTEMACE_WIDTH 16 | |
169 | #define CONFIG_SYS_SYSTEMACE_BASE 0 | |
170 | ||
68969778 SG |
171 | #define CONFIG_MISC_INIT_F |
172 | ||
c861fbf7 | 173 | #endif |