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Commit | Line | Data |
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ee4bbbcb TW |
1 | /* |
2 | * (C) Copyright 2010,2011 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
ee4bbbcb TW |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
1ace4022 | 11 | #include <linux/sizes.h> |
649d0ffb SG |
12 | |
13 | /* LP0 suspend / resume */ | |
29f3e3f2 | 14 | #define CONFIG_TEGRA_LP0 |
649d0ffb SG |
15 | #define CONFIG_AES |
16 | #define CONFIG_TEGRA_PMU | |
17 | #define CONFIG_TPS6586X_POWER | |
18 | #define CONFIG_TEGRA_CLOCK_SCALING | |
19 | ||
00a2749d | 20 | #include "tegra20-common.h" |
ee4bbbcb TW |
21 | |
22 | /* High-level configuration options */ | |
00a2749d | 23 | #define V_PROMPT "Tegra20 (SeaBoard) # " |
29f3e3f2 | 24 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" |
ee4bbbcb TW |
25 | |
26 | /* Board-specific serial config */ | |
29f3e3f2 | 27 | #define CONFIG_TEGRA_ENABLE_UARTD |
ee4bbbcb TW |
28 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
29 | ||
bf80088a SG |
30 | /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ |
31 | #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 | |
32 | ||
05858736 | 33 | #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD |
ee4bbbcb | 34 | |
74652cf6 | 35 | #define CONFIG_BOARD_EARLY_INIT_F |
4576c6e6 | 36 | #define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ |
83800959 | 37 | |
905fe99b | 38 | /* I2C */ |
1f2ba722 | 39 | #define CONFIG_SYS_I2C_TEGRA |
905fe99b | 40 | #define CONFIG_SYS_I2C_INIT_BOARD |
905fe99b SG |
41 | #define CONFIG_SYS_I2C_SPEED 100000 |
42 | #define CONFIG_CMD_I2C | |
1f2ba722 | 43 | #define CONFIG_SYS_I2C |
905fe99b | 44 | |
83800959 TW |
45 | /* SD/MMC */ |
46 | #define CONFIG_MMC | |
47 | #define CONFIG_GENERIC_MMC | |
3f82d89d | 48 | #define CONFIG_TEGRA_MMC |
83800959 TW |
49 | #define CONFIG_CMD_MMC |
50 | ||
f9f2f12e SW |
51 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
52 | #define CONFIG_ENV_IS_IN_MMC | |
91171091 | 53 | #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) |
f9f2f12e | 54 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
573668a2 | 55 | #define CONFIG_SYS_MMC_ENV_PART 2 |
db44ebdb SG |
56 | |
57 | /* USB Host support */ | |
e73c7cdd | 58 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 |
db44ebdb SG |
59 | #define CONFIG_USB_EHCI |
60 | #define CONFIG_USB_EHCI_TEGRA | |
61 | #define CONFIG_USB_STORAGE | |
62 | #define CONFIG_CMD_USB | |
63 | ||
defd5e49 SW |
64 | /* USB networking support */ |
65 | #define CONFIG_USB_HOST_ETHER | |
defd5e49 SW |
66 | #define CONFIG_USB_ETHER_ASIX |
67 | ||
68 | /* General networking support */ | |
69 | #define CONFIG_CMD_NET | |
70 | #define CONFIG_CMD_DHCP | |
71 | ||
2cacf516 | 72 | /* Enable keyboard */ |
29f3e3f2 | 73 | #define CONFIG_TEGRA_KEYBOARD |
2cacf516 SG |
74 | #define CONFIG_KEYBOARD |
75 | ||
5ddcc38b AM |
76 | /* USB keyboard */ |
77 | #define CONFIG_USB_KEYBOARD | |
4576c6e6 MK |
78 | |
79 | /* LCD support */ | |
80 | #define CONFIG_LCD | |
81 | #define CONFIG_PWM_TEGRA | |
82 | #define CONFIG_VIDEO_TEGRA | |
83 | #define LCD_BPP LCD_COLOR16 | |
84 | #define CONFIG_SYS_WHITE_ON_BLACK | |
85 | #define CONFIG_CONSOLE_SCROLL_LINES 10 | |
bea2674c | 86 | |
0dd84084 SG |
87 | /* NAND support */ |
88 | #define CONFIG_CMD_NAND | |
89 | #define CONFIG_TEGRA_NAND | |
90 | ||
91 | /* Max number of NAND devices */ | |
92 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
ef24c38a SG |
93 | |
94 | #include "tegra-common-post.h" | |
95 | ||
ee4bbbcb | 96 | #endif /* __CONFIG_H */ |