[people/ms/u-boot.git] / include / configs / sh7753evb.h

/*
 * Configuation settings for the sh7753evb board
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __SH7753EVB_H
#define __SH7753EVB_H

#define CONFIG_CPU_SH7753	1

#define CONFIG_DISPLAY_BOARDINFO
#undef	CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/* MEMORY */
#define SH7753EVB_SDRAM_BASE		(0x40000000)
#define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)

#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PBSIZE		256
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }

/* SCIF */
#define CONFIG_CONS_SCIF2	1

#define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
					 480 * 1024 * 1024)
#undef	CONFIG_SYS_ALT_MEMTEST
#undef	CONFIG_SYS_MEMTEST_SCRATCH
#undef	CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
					 128 * 1024 * 1024)

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

/* Ether */
#define CONFIG_SH_ETHER_USE_PORT	0
#define CONFIG_SH_ETHER_PHY_ADDR	18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
#define CONFIG_SH_ETHER_USE_GETHER	1
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
#define CONFIG_PHY_VITESSE

#define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
#define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
#define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
#define SH7753EVB_ETHERNET_MAC_SIZE	17
#define SH7753EVB_ETHERNET_NUM_CH	2

/* SPI */
#define CONFIG_SH_SPI_BASE		0xfe002000

/* MMCIF */
#define CONFIG_SH_MMCIF			1
#define CONFIG_SH_MMCIF_ADDR		0xffcb0000
#define CONFIG_SH_MMCIF_CLK		48000000

/* ENV setting */
#define CONFIG_ENV_IS_EMBEDDED
#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_ADDR		(0x00080000)
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
#define CONFIG_EXTRA_ENV_SETTINGS				\
		"netboot=bootp; bootm\0"

/* Board Clock */
#define CONFIG_SYS_CLK_FREQ	48000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV	4
#endif	/* __SH7753EVB_H */
Commit	Line	Data
320cf350 YS	1	/*
	2	* Configuation settings for the sh7753evb board
	3	*
	4	* Copyright (C) 2012 Renesas Solutions Corp.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __SH7753EVB_H
	10	#define __SH7753EVB_H
	11
320cf350	12	#define CONFIG_CPU_SH7753 1
320cf350	13
18a40e84	14	#define CONFIG_DISPLAY_BOARDINFO
320cf350 YS	15	#undef CONFIG_SHOW_BOOT_PROGRESS
	16	#define CONFIG_CMDLINE_EDITING
	17	#define CONFIG_AUTO_COMPLETE
	18
	19	/* MEMORY */
	20	#define SH7753EVB_SDRAM_BASE (0x40000000)
	21	#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
	22
	23	#define CONFIG_SYS_LONGHELP
320cf350	24	#define CONFIG_SYS_PBSIZE 256
320cf350 YS	25	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
	26
	27	/* SCIF */
320cf350	28	#define CONFIG_CONS_SCIF2 1
320cf350 YS	29
	30	#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
	31	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
	32	480 * 1024 * 1024)
	33	#undef CONFIG_SYS_ALT_MEMTEST
	34	#undef CONFIG_SYS_MEMTEST_SCRATCH
	35	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	36
	37	#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
	38	#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE)
	39	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
	40	128 * 1024 * 1024)
	41
	42	#define CONFIG_SYS_MONITOR_BASE 0x00000000
	43	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	44	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
	45	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
	46
320cf350	47	/* Ether */
320cf350 YS	48	#define CONFIG_SH_ETHER_USE_PORT 0
	49	#define CONFIG_SH_ETHER_PHY_ADDR 18
	50	#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
	51	#define CONFIG_SH_ETHER_USE_GETHER 1
320cf350 YS	52	#define CONFIG_BITBANGMII
	53	#define CONFIG_BITBANGMII_MULTI
	54	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
	55	#define CONFIG_PHY_VITESSE
	56
	57	#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000
	58	#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024)
	59	#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI
	60	#define SH7753EVB_ETHERNET_MAC_SIZE 17
	61	#define SH7753EVB_ETHERNET_NUM_CH 2
320cf350 YS	62
320cf350 YS	63	/* SPI */
320cf350	64	#define CONFIG_SH_SPI_BASE 0xfe002000
320cf350 YS	65
320cf350 YS	66	/* MMCIF */
320cf350 YS	67	#define CONFIG_SH_MMCIF 1
	68	#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
	69	#define CONFIG_SH_MMCIF_CLK 48000000
	70
	71	/* ENV setting */
	72	#define CONFIG_ENV_IS_EMBEDDED
320cf350 YS	73	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	74	#define CONFIG_ENV_ADDR (0x00080000)
	75	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
	76	#define CONFIG_ENV_OVERWRITE 1
	77	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	78	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
	79	#define CONFIG_EXTRA_ENV_SETTINGS \
	80	"netboot=bootp; bootm\0"
	81
	82	/* Board Clock */
	83	#define CONFIG_SYS_CLK_FREQ 48000000
	84	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
	85	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
	86	#define CONFIG_SYS_TMU_CLK_DIV 4
	87	#endif /* __SH7753EVB_H */