projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 3b5df50e HS |
1 | /* |
| 2 | * (C) Copyright 2007-2008 | |
| 3 | * Stelian Pop <stelian@popies.net> | |
| 4 | * Lead Tech Design <www.leadtechdesign.com> | |
| 5 | * | |
| 6 | * (C) Copyright 2010 | |
| 7 | * Achim Ehrlich <aehrlich@taskit.de> | |
| 8 | * taskit GmbH <www.taskit.de> | |
| 9 | * | |
| 10 | * (C) Copyright 2012 | |
| 11 | * Markus Hubig <mhubig@imko.de> | |
| 12 | * IMKO GmbH <www.imko.de> | |
| 13 | * | |
| 14 | * (C) Copyright 2014 | |
| 15 | * Heiko Schocher <hs@denx.de> | |
| 16 | * DENX Software Engineering GmbH | |
| 17 | * | |
| 18 | * Configuation settings for the smartweb. | |
| 19 | * | |
| 20 | * SPDX-License-Identifier: GPL-2.0+ | |
| 21 | */ | |
| 22 | ||
| 23 | #ifndef __CONFIG_H | |
| 24 | #define __CONFIG_H | |
| 25 | ||
| 26 | /* | |
| 27 | * SoC must be defined first, before hardware.h is included. | |
| 28 | * In this case SoC is defined in boards.cfg. | |
| 29 | */ | |
| 30 | #include <asm/hardware.h> | |
| e8b81eef | 31 | #include <linux/sizes.h> |
| 3b5df50e HS |
32 | |
| 33 | /* | |
| 34 | * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot | |
| 35 | * program. Since the linker has to swallow that define, we must use a pure | |
| 36 | * hex number here! | |
| 37 | */ | |
| 38 | #define CONFIG_SYS_TEXT_BASE 0x23000000 | |
| 39 | ||
| 40 | /* ARM asynchronous clock */ | |
| 41 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
| 42 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ | |
| 43 | ||
| 44 | /* misc settings */ | |
| 45 | #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ | |
| 46 | #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ | |
| 47 | #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ | |
| 48 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ | |
| 49 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ | |
| 50 | #define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */ | |
| 51 | ||
| b96fd825 MM |
52 | /* We set the max number of command args high to avoid HUSH bugs. */ |
| 53 | #define CONFIG_SYS_MAXARGS 32 | |
| 54 | ||
| 3b5df50e | 55 | /* setting board specific options */ |
| b96fd825 MM |
56 | #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB |
| 57 | #define CONFIG_AUTO_COMPLETE | |
| 58 | #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ | |
| 59 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
| 60 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
| 3b5df50e | 61 | #define CONFIG_AUTO_COMPLETE |
| b96fd825 MM |
62 | #define CONFIG_SYS_AUTOLOAD "yes" |
| 63 | #define CONFIG_RESET_TO_RETRY | |
| 3b5df50e HS |
64 | |
| 65 | /* The LED PINs */ | |
| 66 | #define CONFIG_RED_LED AT91_PIN_PA9 | |
| 67 | #define CONFIG_GREEN_LED AT91_PIN_PA6 | |
| 68 | ||
| 69 | /* | |
| 70 | * SDRAM: 1 bank, 64 MB, base address 0x20000000 | |
| 71 | * Already initialized before u-boot gets started. | |
| 72 | */ | |
| 73 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 74 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
| e8b81eef | 75 | #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) |
| 3b5df50e HS |
76 | |
| 77 | /* | |
| 78 | * Perform a SDRAM Memtest from the start of SDRAM | |
| 79 | * till the beginning of the U-Boot position in RAM. | |
| 80 | */ | |
| 81 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| 82 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) | |
| 83 | ||
| 84 | /* Size of malloc() pool */ | |
| 85 | #define CONFIG_SYS_MALLOC_LEN \ | |
| e8b81eef | 86 | ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000) |
| 3b5df50e HS |
87 | |
| 88 | /* NAND flash settings */ | |
| 89 | #define CONFIG_NAND_ATMEL | |
| 90 | #define CONFIG_SYS_NO_FLASH | |
| 91 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| 92 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
| 93 | #define CONFIG_SYS_NAND_DBW_8 | |
| 94 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 95 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 96 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
| 97 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
| 98 | ||
| 99 | #define CONFIG_CMD_MTDPARTS | |
| 100 | #define CONFIG_MTD_DEVICE | |
| 101 | #define MTDIDS_NAME_STR "atmel_nand" | |
| 102 | #define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR | |
| 103 | #define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \ | |
| 104 | "128k(Bootstrap)," \ | |
| 105 | "896k(U-Boot)," \ | |
| 106 | "512k(ENV0)," \ | |
| 107 | "512k(ENV1)," \ | |
| 108 | "4M(Linux)," \ | |
| 109 | "-(Root-FS)" | |
| 110 | ||
| 111 | /* general purpose I/O */ | |
| 112 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
| 113 | #define CONFIG_AT91_GPIO /* enable the GPIO features */ | |
| 114 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
| 115 | ||
| 116 | /* serial console */ | |
| 117 | #define CONFIG_ATMEL_USART | |
| 118 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| 119 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
| 120 | #define CONFIG_BAUDRATE 115200 | |
| 121 | ||
| 122 | /* | |
| 123 | * Ethernet configuration | |
| 124 | * | |
| 125 | */ | |
| 126 | #define CONFIG_MACB | |
| aca5d083 HS |
127 | #define CONFIG_USB_HOST_ETHER |
| 128 | #define CONFIG_USB_ETHER_ASIX | |
| 129 | #define CONFIG_USB_ETHER_MCS7830 | |
| 3b5df50e HS |
130 | #define CONFIG_RMII /* use reduced MII inteface */ |
| 131 | #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ | |
| 132 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
| 133 | ||
| 134 | /* BOOTP and DHCP options */ | |
| 135 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 136 | #define CONFIG_BOOTP_BOOTPATH | |
| 137 | #define CONFIG_BOOTP_GATEWAY | |
| 138 | #define CONFIG_BOOTP_HOSTNAME | |
| 139 | #define CONFIG_NFSBOOTCOMMAND \ | |
| 140 | "setenv autoload yes; setenv autoboot yes; " \ | |
| 141 | "setenv bootargs ${basicargs} ${mtdparts} " \ | |
| 142 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ | |
| 143 | "dhcp" | |
| 144 | ||
| 145 | /* Enable the watchdog */ | |
| 146 | #define CONFIG_AT91SAM9_WATCHDOG | |
| 147 | #if !defined(CONFIG_SPL_BUILD) | |
| 148 | #define CONFIG_HW_WATCHDOG | |
| 149 | #endif | |
| 150 | #define CONFIG_AT91_HW_WDT_TIMEOUT 15 | |
| 151 | ||
| 152 | #if !defined(CONFIG_SPL_BUILD) | |
| 153 | /* USB configuration */ | |
| e8b81eef | 154 | #define CONFIG_CMD_USB |
| 3b5df50e HS |
155 | #define CONFIG_USB_ATMEL |
| 156 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB | |
| 157 | #define CONFIG_USB_OHCI_NEW | |
| 3b5df50e HS |
158 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 159 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE | |
| 160 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
| 161 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
| e8b81eef HS |
162 | |
| 163 | #define CONFIG_USB_HOST_ETHER | |
| 164 | #define CONFIG_USB_ETHER_ASIX | |
| 165 | #define CONFIG_USB_ETHER_MCS7830 | |
| 166 | ||
| 167 | /* USB DFU support */ | |
| 168 | #define CONFIG_CMD_MTDPARTS | |
| 169 | #define CONFIG_MTD_DEVICE | |
| 170 | #define CONFIG_MTD_PARTITIONS | |
| 171 | ||
| 172 | #define CONFIG_USB_GADGET | |
| 173 | #define CONFIG_USB_GADGET_AT91 | |
| 174 | ||
| 175 | /* DFU class support */ | |
| 176 | #define CONFIG_CMD_DFU | |
| 177 | #define CONFIG_USB_FUNCTION_DFU | |
| 178 | #define CONFIG_DFU_NAND | |
| 179 | #define CONFIG_USB_GADGET_DOWNLOAD | |
| 180 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 | |
| 181 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M | |
| 182 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 | |
| 183 | ||
| 184 | /* USB DFU IDs */ | |
| 185 | #define CONFIG_G_DNL_VENDOR_NUM 0x0908 | |
| 186 | #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2 | |
| 187 | #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" | |
| 188 | ||
| 189 | #define CONFIG_SYS_CACHELINE_SIZE 0x2000 | |
| 3b5df50e HS |
190 | #endif |
| 191 | ||
| 192 | /* General Boot Parameter */ | |
| 193 | #define CONFIG_BOOTDELAY 3 | |
| 194 | #define CONFIG_BOOTCOMMAND "run flashboot" | |
| 3b5df50e | 195 | #define CONFIG_SYS_CBSIZE 512 |
| 3b5df50e HS |
196 | #define CONFIG_SYS_PBSIZE \ |
| 197 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 198 | #define CONFIG_SYS_LONGHELP | |
| 199 | #define CONFIG_CMDLINE_EDITING | |
| 200 | ||
| 201 | /* | |
| 202 | * RAM Memory address where to put the | |
| 203 | * Linux Kernel befor starting. | |
| 204 | */ | |
| 205 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 | |
| 206 | ||
| 207 | /* | |
| 208 | * The NAND Flash partitions: | |
| 209 | */ | |
| 210 | #define CONFIG_ENV_IS_IN_NAND | |
| 211 | #define CONFIG_ENV_OFFSET (0x100000) | |
| 212 | #define CONFIG_ENV_OFFSET_REDUND (0x180000) | |
| e8b81eef HS |
213 | #define CONFIG_ENV_RANGE (SZ_512K) |
| 214 | #define CONFIG_ENV_SIZE (SZ_128K) | |
| 3b5df50e HS |
215 | |
| 216 | /* | |
| 217 | * Predefined environment variables. | |
| 218 | * Usefull to define some easy to use boot commands. | |
| 219 | */ | |
| 220 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 221 | \ | |
| 222 | "basicargs=console=ttyS0,115200\0" \ | |
| 223 | \ | |
| 224 | "mtdparts="MTDPARTS_DEFAULT"\0" | |
| 225 | ||
| 226 | /* Command line & features configuration */ | |
| 227 | #undef CONFIG_CMD_FPGA | |
| 228 | #undef CONFIG_CMD_IMI | |
| 229 | #undef CONFIG_CMD_IMLS | |
| 230 | #undef CONFIG_CMD_LOADS | |
| 231 | ||
| 232 | #define CONFIG_CMD_NAND | |
| 3b5df50e HS |
233 | #define CONFIG_CMD_FAT |
| 234 | ||
| 235 | #ifdef CONFIG_MACB | |
| 236 | # define CONFIG_CMD_PING | |
| 237 | # define CONFIG_CMD_DHCP | |
| 238 | #else | |
| 239 | # undef CONFIG_CMD_BOOTD | |
| 240 | # undef CONFIG_CMD_NET | |
| 241 | # undef CONFIG_CMD_NFS | |
| 242 | #endif /* CONFIG_MACB */ | |
| 243 | ||
| 244 | #if !defined(CONFIG_SPL_BUILD) | |
| 245 | /* Enable Device-Tree (FDT) support */ | |
| 3b5df50e HS |
246 | #define CONFIG_CMD_FDT |
| 247 | #define CONFIG_FIT | |
| 248 | #endif | |
| 249 | ||
| 250 | #ifdef CONFIG_SPL_BUILD | |
| 251 | #define CONFIG_SYS_INIT_SP_ADDR 0x301000 | |
| 252 | #define CONFIG_SPL_STACK_R | |
| 253 | #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE | |
| 254 | #else | |
| 255 | /* | |
| 256 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
| 257 | * leaving the correct space for initial global data structure above that | |
| 258 | * address while providing maximum stack area below. | |
| 259 | */ | |
| 260 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 261 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| 262 | #endif | |
| 263 | ||
| 264 | ||
| 265 | /* Defines for SPL */ | |
| 266 | #define CONFIG_SPL_FRAMEWORK | |
| 267 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
| e8b81eef | 268 | #define CONFIG_SPL_MAX_SIZE (SZ_4K) |
| 3b5df50e HS |
269 | |
| 270 | #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE | |
| e8b81eef | 271 | #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) |
| 3b5df50e HS |
272 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
| 273 | CONFIG_SPL_BSS_MAX_SIZE) | |
| 274 | #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN | |
| 275 | #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | |
| 276 | ||
| 277 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
| 278 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
| 279 | ||
| 280 | #define CONFIG_SPL_BOARD_INIT | |
| 281 | #define CONFIG_SPL_GPIO_SUPPORT | |
| 282 | #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) | |
| 283 | #define CONFIG_SPL_NAND_SUPPORT | |
| 284 | #define CONFIG_SYS_USE_NANDFLASH 1 | |
| 285 | #define CONFIG_SPL_NAND_DRIVERS | |
| 286 | #define CONFIG_SPL_NAND_BASE | |
| 287 | #define CONFIG_SPL_NAND_ECC | |
| 288 | #define CONFIG_SPL_NAND_RAW_ONLY | |
| 289 | #define CONFIG_SPL_NAND_SOFTECC | |
| 290 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 | |
| e8b81eef | 291 | #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K |
| 3b5df50e HS |
292 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 293 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE | |
| 294 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 295 | ||
| e8b81eef HS |
296 | #define CONFIG_SYS_NAND_SIZE (SZ_256M) |
| 297 | #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K | |
| 298 | #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) | |
| 3b5df50e HS |
299 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ |
| 300 | CONFIG_SYS_NAND_PAGE_SIZE) | |
| 301 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
| 302 | #define CONFIG_SYS_NAND_ECCSIZE 256 | |
| 303 | #define CONFIG_SYS_NAND_ECCBYTES 3 | |
| 304 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
| 305 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ | |
| 306 | 48, 49, 50, 51, 52, 53, 54, 55, \ | |
| 307 | 56, 57, 58, 59, 60, 61, 62, 63, } | |
| 308 | ||
| 309 | #define CONFIG_SPL_ATMEL_SIZE | |
| 310 | #define CONFIG_SYS_MASTER_CLOCK (198656000/2) | |
| 311 | #define AT91_PLL_LOCK_TIMEOUT 1000000 | |
| 312 | #define CONFIG_SYS_AT91_PLLA 0x2060bf09 | |
| 313 | #define CONFIG_SYS_MCKR 0x100 | |
| 314 | #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) | |
| 315 | #define CONFIG_SYS_AT91_PLLB 0x10483f0e | |
| 316 | ||
| 317 | #if defined(CONFIG_SPL_BUILD) | |
| 318 | #define CONFIG_SYS_THUMB_BUILD | |
| 319 | #define CONFIG_SYS_ICACHE_OFF | |
| 320 | #define CONFIG_SYS_DCACHE_OFF | |
| 321 | #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ | |
| 322 | #endif | |
| 323 | #endif /* __CONFIG_H */ |