[people/ms/u-boot.git] / include / configs / smdk2410.h

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 * Gary Jennejohn <garyj@denx.de>
 * David Mueller <d.mueller@elsoft.ch>
 *
 * Configuation settings for the SAMSUNG SMDK2410 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T		/* This is an ARM920T Core */
#define CONFIG_S3C24X0		/* in a SAMSUNG S3C24x0-type SoC */
#define CONFIG_S3C2410		/* specifically a SAMSUNG S3C2410 SoC */
#define CONFIG_SMDK2410		/* on a SAMSUNG SMDK2410 Board */

#define CONFIG_SYS_TEXT_BASE	0x0

#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH

/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
#define CONFIG_SYS_CLK_FREQ	12000000

#undef CONFIG_USE_IRQ		/* we don't need IRQ/FIQ stuff */

#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Hardware drivers
 */
#define CONFIG_CS8900		/* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE	0x19000300
#define CONFIG_CS8900_BUS16	/* the Linux driver does accesses as shorts */

/*
 * select serial console configuration
 */
#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on SMDK2410 */

/************************************************************
 * USB support (currently only works with D-cache off)
 ************************************************************/
#define CONFIG_USB_OHCI
#define CONFIG_USB_KEYBOARD
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION

/************************************************************
 * RTC
 ************************************************************/
#define CONFIG_RTC_S3C24X0


#define CONFIG_BAUDRATE		115200

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_BSP
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_USB

#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_CMDLINE_EDITING

/* autoboot */
#define CONFIG_BOOTDELAY	5
#define CONFIG_BOOT_RETRY_TIME	-1
#define CONFIG_RESET_TO_RETRY
#define CONFIG_ZERO_BOOTDELAY_CHECK

#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_IPADDR		10.0.0.110
#define CONFIG_SERVERIP		10.0.0.1

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_PROMPT	"SMDK2410 # "
#define CONFIG_SYS_CBSIZE	256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
				sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE

/* may be activated as soon as s3c24x0 has print_cpuinfo support */
/*#define CONFIG_DISPLAY_CPUINFO*/		/* Display cpu info */

#define CONFIG_SYS_MEMTEST_START	0x30000000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x33F00000	/* 63 MB in DRAM */

#define CONFIG_SYS_LOAD_ADDR		0x30800000

#define CONFIG_SYS_HZ			1000

/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/* support additional compression methods */
#define CONFIG_BZIP2
#define CONFIG_LZO
#define CONFIG_LZMA

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1          /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #0 */

#define CONFIG_SYS_FLASH_BASE	PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_FLASH_LEGACY_512Kx16
#define CONFIG_FLASH_SHOW_PROGRESS	45

#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
#define CONFIG_SYS_MAX_FLASH_SECT	(19)

#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0x070000)
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE			0x10000
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/*
 * Size of malloc() pool
 * BZIP2 / LZO / LZMA need a lot of RAM
 */
#define CONFIG_SYS_MALLOC_LEN	(4 * 1024 * 1024)

#define CONFIG_SYS_MONITOR_LEN	(448 * 1024)
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE

/*
 * NAND configuration
 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_S3C2410
#define CONFIG_SYS_S3C2410_NAND_HWECC
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x4E000000
#endif

/*
 * File system
 */
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_YAFFS2
#define CONFIG_RBTREE

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
				GENERATED_GBL_DATA_SIZE)

#define CONFIG_BOARD_EARLY_INIT_F

#endif /* __CONFIG_H */
Commit	Line	Data
81a8824f WD	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
792a09eb	5	* Gary Jennejohn <garyj@denx.de>
81a8824f WD	6	* David Mueller <d.mueller@elsoft.ch>
	7	*
	8	* Configuation settings for the SAMSUNG SMDK2410 board.
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H
	30	#define __CONFIG_H
	31
81a8824f WD	32	/*
	33	* High Level Configuration Options
	34	* (easy to change)
	35	*/
d0b375f6 DMEA	36	#define CONFIG_ARM920T /* This is an ARM920T Core */
	37	#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
	38	#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
	39	#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
81a8824f	40
4479fc5b DMEA	41	#define CONFIG_SYS_TEXT_BASE 0x0
4479fc5b DMEA	42
d0b375f6	43	#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
81a8824f	44
d0b375f6 DMEA	45	/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
d0b375f6 DMEA	46	#define CONFIG_SYS_CLK_FREQ 12000000
81a8824f	47
d0b375f6	48	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
81a8824f	49
d0b375f6 DMEA	50	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	51	#define CONFIG_SETUP_MEMORY_TAGS
	52	#define CONFIG_INITRD_TAG
81a8824f WD	53
	54	/*
	55	* Hardware drivers
	56	*/
b1c0eaac BW	57	#define CONFIG_CS8900 /* we have a CS8900 on-board */
	58	#define CONFIG_CS8900_BASE 0x19000300
	59	#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
81a8824f WD	60
	61	/*
	62	* select serial console configuration
	63	*/
300f99f4	64	#define CONFIG_S3C24X0_SERIAL
d0b375f6 DMEA	65	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
	66
	67	/************************************************************
	68	* USB support (currently only works with D-cache off)
	69	************************************************************/
	70	#define CONFIG_USB_OHCI
	71	#define CONFIG_USB_KEYBOARD
	72	#define CONFIG_USB_STORAGE
	73	#define CONFIG_DOS_PARTITION
81a8824f	74
48b42616 WD	75	/************************************************************
	76	* RTC
	77	************************************************************/
d0b375f6	78	#define CONFIG_RTC_S3C24X0
48b42616	79
81a8824f WD	80
	81	#define CONFIG_BAUDRATE 115200
	82
079a136c JL	83	/*
	84	* BOOTP options
	85	*/
	86	#define CONFIG_BOOTP_BOOTFILESIZE
	87	#define CONFIG_BOOTP_BOOTPATH
	88	#define CONFIG_BOOTP_GATEWAY
	89	#define CONFIG_BOOTP_HOSTNAME
	90
46da1e96 JL	91	/*
	92	* Command line configuration.
	93	*/
	94	#include <config_cmd_default.h>
	95
d0b375f6	96	#define CONFIG_CMD_BSP
46da1e96	97	#define CONFIG_CMD_CACHE
46da1e96	98	#define CONFIG_CMD_DATE
d0b375f6	99	#define CONFIG_CMD_DHCP
46da1e96	100	#define CONFIG_CMD_ELF
d0b375f6 DMEA	101	#define CONFIG_CMD_NAND
	102	#define CONFIG_CMD_PING
	103	#define CONFIG_CMD_REGINFO
	104	#define CONFIG_CMD_USB
	105
	106	#define CONFIG_SYS_HUSH_PARSER
	107	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	108	#define CONFIG_CMDLINE_EDITING
	109
	110	/* autoboot */
	111	#define CONFIG_BOOTDELAY 5
	112	#define CONFIG_BOOT_RETRY_TIME -1
	113	#define CONFIG_RESET_TO_RETRY
	114	#define CONFIG_ZERO_BOOTDELAY_CHECK
	115
	116	#define CONFIG_NETMASK 255.255.255.0
81a8824f WD	117	#define CONFIG_IPADDR 10.0.0.110
81a8824f WD	118	#define CONFIG_SERVERIP 10.0.0.1
81a8824f	119
46da1e96	120	#if defined(CONFIG_CMD_KGDB)
d0b375f6	121	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
81a8824f	122	/* what's this ? it's not used anywhere */
d0b375f6	123	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
81a8824f WD	124	#endif
	125
	126	/*
	127	* Miscellaneous configurable options
	128	*/
d0b375f6 DMEA	129	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	130	#define CONFIG_SYS_PROMPT "SMDK2410 # "
	131	#define CONFIG_SYS_CBSIZE 256
	132	/* Print Buffer Size */
	133	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	134	sizeof(CONFIG_SYS_PROMPT)+16)
	135	#define CONFIG_SYS_MAXARGS 16
	136	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	137
	138	/* may be activated as soon as s3c24x0 has print_cpuinfo support */
	139	/#define CONFIG_DISPLAY_CPUINFO/ /* Display cpu info */
81a8824f	140
d0b375f6 DMEA	141	#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
d0b375f6 DMEA	142	#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
81a8824f	143
d0b375f6	144	#define CONFIG_SYS_LOAD_ADDR 0x30800000
81a8824f	145
d0b375f6	146	#define CONFIG_SYS_HZ 1000
81a8824f WD	147
81a8824f WD	148	/* valid baudrates */
6d0f6bcf	149	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
81a8824f	150
d0b375f6 DMEA	151	/* support additional compression methods */
	152	#define CONFIG_BZIP2
	153	#define CONFIG_LZO
	154	#define CONFIG_LZMA
	155
81a8824f WD	156	/*-----------------------------------------------------------------------
	157	* Stack sizes
	158	*
	159	* The stack sizes are set up in start.S using the settings below
	160	*/
	161	#define CONFIG_STACKSIZE (1281024) / regular stack */
	162	#ifdef CONFIG_USE_IRQ
	163	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	164	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	165	#endif
	166
	167	/*-----------------------------------------------------------------------
	168	* Physical Memory Map
	169	*/
d0b375f6	170	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
81a8824f WD	171	#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
	172	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
	173
d0b375f6	174	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
81a8824f	175
a5ec7f64	176	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
81a8824f WD	177
	178	/*-----------------------------------------------------------------------
	179	* FLASH and environment organization
	180	*/
	181
a5ec7f64 DMEA	182	#define CONFIG_SYS_FLASH_CFI
	183	#define CONFIG_FLASH_CFI_DRIVER
	184	#define CONFIG_FLASH_CFI_LEGACY
	185	#define CONFIG_SYS_FLASH_LEGACY_512Kx16
	186	#define CONFIG_FLASH_SHOW_PROGRESS 45
81a8824f	187
a5ec7f64	188	#define CONFIG_SYS_MAX_FLASH_BANKS 1
d0b375f6	189	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
a5ec7f64	190	#define CONFIG_SYS_MAX_FLASH_SECT (19)
81a8824f	191
d0b375f6 DMEA	192	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
	193	#define CONFIG_ENV_IS_IN_FLASH
	194	#define CONFIG_ENV_SIZE 0x10000
	195	/* allow to overwrite serial and ethaddr */
	196	#define CONFIG_ENV_OVERWRITE
	197
	198	/*
	199	* Size of malloc() pool
	200	* BZIP2 / LZO / LZMA need a lot of RAM
	201	*/
	202	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
81a8824f	203
a5ec7f64 DMEA	204	#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
	205	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	206
d0b375f6 DMEA	207	/*
	208	* NAND configuration
	209	*/
	210	#ifdef CONFIG_CMD_NAND
	211	#define CONFIG_NAND_S3C2410
	212	#define CONFIG_SYS_S3C2410_NAND_HWECC
	213	#define CONFIG_SYS_MAX_NAND_DEVICE 1
d0b375f6 DMEA	214	#define CONFIG_SYS_NAND_BASE 0x4E000000
	215	#endif
	216
	217	/*
	218	* File system
	219	*/
	220	#define CONFIG_CMD_FAT
	221	#define CONFIG_CMD_EXT2
	222	#define CONFIG_CMD_UBI
	223	#define CONFIG_CMD_UBIFS
	224	#define CONFIG_CMD_MTDPARTS
	225	#define CONFIG_MTD_DEVICE
	226	#define CONFIG_MTD_PARTITIONS
	227	#define CONFIG_YAFFS2
	228	#define CONFIG_RBTREE
	229
b9f15902 DMEA	230	/* additions for new relocation code, must be added to all boards */
	231	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	232	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
	233	GENERATED_GBL_DATA_SIZE)
	234
d0b375f6	235	#define CONFIG_BOARD_EARLY_INIT_F
b9f15902	236
d0b375f6	237	#endif /* __CONFIG_H */