]>
Commit | Line | Data |
---|---|---|
8bc4ee9e MK |
1 | /* |
2 | * (C) Copyright 2009 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * HeungJun Kim <riverful.kim@samsung.com> | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * | |
7 | * Configuation settings for the SAMSUNG SMDKC100 board. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
8bc4ee9e MK |
10 | */ |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
3709844f AA |
15 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
16 | ||
8bc4ee9e MK |
17 | /* |
18 | * High Level Configuration Options | |
19 | * (easy to change) | |
20 | */ | |
8bc4ee9e | 21 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 22 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
8bc4ee9e MK |
23 | #define CONFIG_S5PC100 1 /* which is in a S5PC100 */ |
24 | #define CONFIG_SMDKC100 1 /* working with SMDKC100 */ | |
25 | ||
26 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
27 | ||
28 | #define CONFIG_ARCH_CPU_INIT | |
29 | ||
30 | #define CONFIG_DISPLAY_CPUINFO | |
31 | #define CONFIG_DISPLAY_BOARDINFO | |
32 | ||
8bc4ee9e MK |
33 | /* input clock of PLL: SMDKC100 has 12MHz input clock */ |
34 | #define CONFIG_SYS_CLK_FREQ 12000000 | |
35 | ||
36 | /* DRAM Base */ | |
37 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
38 | ||
08bcbc4a MK |
39 | /* Text Base */ |
40 | #define CONFIG_SYS_TEXT_BASE 0x34800000 | |
41 | ||
8bc4ee9e MK |
42 | #define CONFIG_SETUP_MEMORY_TAGS |
43 | #define CONFIG_CMDLINE_TAG | |
44 | #define CONFIG_INITRD_TAG | |
45 | #define CONFIG_CMDLINE_EDITING | |
46 | ||
47 | /* | |
48 | * Size of malloc() pool | |
49 | * 1MB = 0x100000, 0x100000 = 1024 * 1024 | |
50 | */ | |
51 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
2ecd7797 | 52 | |
8bc4ee9e MK |
53 | /* |
54 | * select serial console configuration | |
55 | */ | |
56 | #define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */ | |
8bc4ee9e | 57 | |
dc795a88 MK |
58 | /* PWM */ |
59 | #define CONFIG_PWM 1 | |
60 | ||
8bc4ee9e MK |
61 | /* allow to overwrite serial and ethaddr */ |
62 | #define CONFIG_ENV_OVERWRITE | |
63 | #define CONFIG_BAUDRATE 115200 | |
64 | ||
65 | /*********************************************************** | |
66 | * Command definition | |
67 | ***********************************************************/ | |
8bc4ee9e | 68 | #undef CONFIG_CMD_NAND |
8bc4ee9e MK |
69 | |
70 | #define CONFIG_CMD_CACHE | |
71 | #define CONFIG_CMD_REGINFO | |
72 | #define CONFIG_CMD_ONENAND | |
8bc4ee9e MK |
73 | #define CONFIG_CMD_FAT |
74 | #define CONFIG_CMD_MTDPARTS | |
75 | ||
76 | #define CONFIG_BOOTDELAY 3 | |
77 | ||
78 | #define CONFIG_ZERO_BOOTDELAY_CHECK | |
79 | ||
80 | #define CONFIG_MTD_DEVICE | |
81 | #define CONFIG_MTD_PARTITIONS | |
82 | ||
83 | #define MTDIDS_DEFAULT "onenand0=s3c-onenand" | |
84 | #define MTDPARTS_DEFAULT "mtdparts=s3c-onenand:256k(bootloader)"\ | |
85 | ",128k@0x40000(params)"\ | |
86 | ",3m@0x60000(kernel)"\ | |
87 | ",16m@0x360000(test)"\ | |
88 | ",-(UBI)" | |
89 | ||
90 | #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT | |
91 | ||
92 | #define CONFIG_BOOTCOMMAND "run ubifsboot" | |
93 | ||
94 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ | |
95 | " console=ttySAC0,115200n8" \ | |
96 | " mem=128M" | |
97 | ||
98 | #define CONFIG_COMMON_BOOT "console=ttySAC0,115200n8" \ | |
99 | " mem=128M " \ | |
100 | " " MTDPARTS_DEFAULT | |
101 | ||
102 | #define CONFIG_BOOTARGS "root=/dev/mtdblock5 ubi.mtd=4" \ | |
103 | " rootfstype=cramfs " CONFIG_COMMON_BOOT | |
104 | ||
105 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \ | |
106 | " onenand write 0x32008000 0x0 0x40000\0" | |
107 | ||
108 | #define CONFIG_ENV_OVERWRITE | |
109 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
110 | CONFIG_UPDATEB \ | |
111 | "updatek=" \ | |
112 | "onenand erase 0x60000 0x300000;" \ | |
113 | "onenand write 0x31008000 0x60000 0x300000\0" \ | |
114 | "updateu=" \ | |
115 | "onenand erase block 147-4095;" \ | |
116 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
117 | "bootk=" \ | |
118 | "onenand read 0x30007FC0 0x60000 0x300000;" \ | |
119 | "bootm 0x30007FC0\0" \ | |
120 | "flashboot=" \ | |
121 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
122 | "rootfstype=${rootfstype} " \ | |
123 | "ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT ";" \ | |
124 | "run bootk\0" \ | |
125 | "ubifsboot=" \ | |
126 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
127 | " ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT "; " \ | |
128 | "run bootk\0" \ | |
129 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
130 | "android=" \ | |
131 | "set bootargs root=ubi0!ramdisk ubi.mtd=${ubiblock} " \ | |
132 | "rootfstype=ubifs init=/init.sh " CONFIG_COMMON_BOOT "; " \ | |
133 | "run bootk\0" \ | |
134 | "nfsboot=" \ | |
135 | "set bootargs root=/dev/nfs ubi.mtd=${ubiblock} " \ | |
136 | "nfsroot=${nfsroot},nolock " \ | |
137 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
138 | "${netmask}:nowplus:usb0:off " CONFIG_COMMON_BOOT "; " \ | |
139 | "run bootk\0" \ | |
140 | "ramboot=" \ | |
141 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
142 | " initrd=0x33000000,8M ramdisk=8192\0" \ | |
143 | "rootfstype=cramfs\0" \ | |
144 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
145 | "meminfo=mem=128M\0" \ | |
146 | "nfsroot=/nfsroot/arm\0" \ | |
147 | "bootblock=5\0" \ | |
148 | "ubiblock=4\0" \ | |
149 | "ubi=enabled" | |
150 | ||
151 | /* | |
152 | * Miscellaneous configurable options | |
153 | */ | |
154 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
8bc4ee9e MK |
155 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
156 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
157 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
158 | /* Boot Argument Buffer Size */ | |
159 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
160 | /* memtest works on */ | |
161 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
162 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5e00000) | |
163 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE | |
164 | ||
8bc4ee9e MK |
165 | /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ |
166 | #define CONFIG_NR_DRAM_BANKS 1 | |
167 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ | |
168 | #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ | |
169 | ||
170 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
171 | ||
172 | /*----------------------------------------------------------------------- | |
173 | * FLASH and environment organization | |
174 | */ | |
175 | #define CONFIG_SYS_NO_FLASH 1 | |
176 | ||
177 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
178 | #define CONFIG_IDENT_STRING " for SMDKC100" | |
179 | ||
14d0a02a | 180 | #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) |
8bc4ee9e MK |
181 | #define CONFIG_ENABLE_MMU |
182 | #endif | |
183 | ||
184 | #ifdef CONFIG_ENABLE_MMU | |
185 | #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 | |
186 | #else | |
187 | #define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE | |
188 | #endif | |
189 | ||
190 | /*----------------------------------------------------------------------- | |
191 | * Boot configuration | |
192 | */ | |
193 | #define CONFIG_ENV_IS_IN_ONENAND 1 | |
194 | #define CONFIG_ENV_SIZE (128 << 10) /* 128KiB, 0x20000 */ | |
195 | #define CONFIG_ENV_ADDR (256 << 10) /* 256KiB, 0x40000 */ | |
196 | #define CONFIG_ENV_OFFSET (256 << 10) /* 256KiB, 0x40000 */ | |
197 | ||
198 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
199 | #define CONFIG_SAMSUNG_ONENAND 1 | |
200 | #define CONFIG_SYS_ONENAND_BASE 0xE7100000 | |
201 | ||
202 | #define CONFIG_DOS_PARTITION 1 | |
203 | ||
98877c3c MK |
204 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
205 | ||
2528dc52 NKC |
206 | /* |
207 | * Ethernet Contoller driver | |
208 | */ | |
209 | #ifdef CONFIG_CMD_NET | |
2528dc52 NKC |
210 | #define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ |
211 | #define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ | |
212 | #define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ | |
213 | #define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ | |
214 | #endif /* CONFIG_CMD_NET */ | |
215 | ||
8bc4ee9e | 216 | #endif /* __CONFIG_H */ |