[people/ms/u-boot.git] / include / configs / smdkv310.h

/*
 * Copyright (C) 2011 Samsung Electronics
 *
 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "exynos4-common.h"

#undef CONFIG_BOARD_COMMON
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
#undef CONFIG_REVISION_TAG

/* High Level Configuration Options */
#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
#define CONFIG_SMDKV310			1	/* working with SMDKV310*/

/* Mach Type */
#define CONFIG_MACH_TYPE		MACH_TYPE_SMDKV310

#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_TEXT_BASE		0x43E00000

/* Handling Sleep Mode*/
#define S5P_CHECK_SLEEP			0x00000BAD
#define S5P_CHECK_DIDLE			0xBAD00000
#define S5P_CHECK_LPA			0xABAD0000

/* select serial console configuration */
#define CONFIG_SERIAL1			1	/* use SERIAL 1 */
#define EXYNOS4_DEFAULT_UART_OFFSET	0x010000

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* MMC SPL */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define COPY_BL2_FNPTR_ADDR	0x00002488

#define CONFIG_SPL_TEXT_BASE	0x02021410

#define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"

/* Miscellaneous configurable options */
#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)

/* SMDKV310 has 4 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS	4
#define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE

/* FLASH and environment organization */

#define CONFIG_CLK_1000_400_200

/* MIU (Memory Interleaving Unit) */
#define CONFIG_MIU_2BIT_INTERLEAVED

#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
#define RESERVE_BLOCK_SIZE		(512)
#define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)

#define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)

#define CONFIG_SYS_INIT_SP_ADDR		0x02040000

/* U-Boot copy size from boot Media to DRAM.*/
#define	COPY_BL2_SIZE		0x80000
#define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
#define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)

/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_ENV_SROM_BANK		1
#endif /*CONFIG_CMD_NET*/

#endif	/* __CONFIG_H */
Commit	Line	Data
e21185ba CK	1	/*
	2	* Copyright (C) 2011 Samsung Electronics
	3	*
393cb361	4	* Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
e21185ba	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
e21185ba CK	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
1d551100 SG	12	#include "exynos4-common.h"
	13
	14	#undef CONFIG_BOARD_COMMON
e30824f4	15	#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
1d551100	16	#undef CONFIG_REVISION_TAG
1d551100	17
e21185ba	18	/* High Level Configuration Options */
393cb361	19	#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
e21185ba CK	20	#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
e21185ba CK	21
b3c5a49b CK	22	/* Mach Type */
	23	#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
	24
e21185ba CK	25	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	26	#define CONFIG_SYS_TEXT_BASE 0x43E00000
	27
e21185ba CK	28	/* Handling Sleep Mode*/
	29	#define S5P_CHECK_SLEEP 0x00000BAD
	30	#define S5P_CHECK_DIDLE 0xBAD00000
643be9c0	31	#define S5P_CHECK_LPA 0xABAD0000
e21185ba	32
e21185ba	33	/* select serial console configuration */
e21185ba	34	#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
393cb361	35	#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
e21185ba	36
e21185ba CK	37	/* allow to overwrite serial and ethaddr */
	38	#define CONFIG_ENV_OVERWRITE
	39
5187d8dd	40	/* MMC SPL */
643be9c0	41	#define CONFIG_SKIP_LOWLEVEL_INIT
9b3ab1c9	42	#define COPY_BL2_FNPTR_ADDR 0x00002488
e21185ba	43
8a00061e IS	44	#define CONFIG_SPL_TEXT_BASE 0x02021410
8a00061e IS	45
e21185ba CK	46	#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
	47
	48	/* Miscellaneous configurable options */
e21185ba	49	#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
e21185ba CK	50	/* memtest works on */
	51	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	52	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
	53	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
	54
e21185ba CK	55	/* SMDKV310 has 4 bank of DRAM */
	56	#define CONFIG_NR_DRAM_BANKS 4
	57	#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
	58	#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
	59	#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
	60	#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
	61	#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
	62	#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
	63	#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
	64	#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
	65	#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
	66
	67	/* FLASH and environment organization */
e21185ba	68
e21185ba CK	69	#define CONFIG_CLK_1000_400_200
	70
	71	/* MIU (Memory Interleaving Unit) */
	72	#define CONFIG_MIU_2BIT_INTERLEAVED
	73
e21185ba CK	74	#define CONFIG_SYS_MMC_ENV_DEV 0
	75	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
	76	#define RESERVE_BLOCK_SIZE (512)
	77	#define BL1_SIZE (16 << 10) /16 K reserved for BL1/
	78	#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
e21185ba	79
643be9c0 RS	80	#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
	81
	82	#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
e21185ba	83
a187559e	84	/* U-Boot copy size from boot Media to DRAM.*/
e21185ba CK	85	#define COPY_BL2_SIZE 0x80000
	86	#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
	87	#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
	88
	89	/* Ethernet Controllor Driver */
	90	#ifdef CONFIG_CMD_NET
e21185ba CK	91	#define CONFIG_ENV_SROM_BANK 1
e21185ba CK	92	#endif /CONFIG_CMD_NET/
07407d97	93
e21185ba	94	#endif /* __CONFIG_H */