[people/ms/u-boot.git] / include / configs / sniper.h

/*
 * LG Optimus Black codename sniper config
 *
 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/cpu.h>
#include <asm/arch/omap.h>

/*
 * CPU
 */

#define CONFIG_ARM_ARCH_CP15_ERRATA

/*
 * Board
 */

#define CONFIG_MISC_INIT_R

/*
 * Clocks
 */

#define CONFIG_SYS_TIMERBASE	OMAP34XX_GPT2
#define CONFIG_SYS_PTV		2

#define V_NS16550_CLK		48000000
#define V_OSCK			26000000
#define V_SCLK			(V_OSCK >> 1)

/*
 * DRAM
 */

#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1

/*
 * Memory
 */

#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
					 GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024 + CONFIG_ENV_SIZE)

/*
 * I2C
 */

#define CONFIG_SYS_I2C
#define CONFIG_I2C_MULTI_BUS

/*
 * Input
 */

#define CONFIG_TWL4030_INPUT

/*
 * SPL
 */

#define CONFIG_SPL_TEXT_BASE		0x40200000
#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
					 CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		(512 * 1024)
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	(1024 * 1024)
#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION		1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME			"u-boot.img"

#define CONFIG_SYS_CBSIZE	512

/*
 * Serial
 */

#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#endif

#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
#define CONFIG_CONS_INDEX		3

#define CONFIG_SYS_BAUDRATE_TABLE	{ 4800, 9600, 19200, 38400, 57600, \
					  115200 }

/*
 * Environment
 */

#define CONFIG_ENV_SIZE		(128 * 1024)

#define CONFIG_ENV_OVERWRITE

#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel_addr_r=0x82000000\0" \
	"loadaddr=0x82000000\0" \
	"fdt_addr_r=0x88000000\0" \
	"fdtaddr=0x88000000\0" \
	"ramdisk_addr_r=0x88080000\0" \
	"pxefile_addr_r=0x80100000\0" \
	"scriptaddr=0x80000000\0" \
	"bootm_size=0x10000000\0" \
	"boot_mmc_dev=0\0" \
	"kernel_mmc_part=3\0" \
	"recovery_mmc_part=4\0" \
	"fdtfile=omap3-sniper.dtb\0" \
	"bootfile=/boot/extlinux/extlinux.conf\0" \
	"bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"

/*
 * ATAGs
 */

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG

/*
 * Boot
 */

#define CONFIG_SYS_LOAD_ADDR	0x82000000

#define CONFIG_BOOTCOMMAND \
	"setenv boot_mmc_part ${kernel_mmc_part}; " \
	"if test reboot-${reboot-mode} = reboot-r; then " \
	"echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
	"if test reboot-${reboot-mode} = reboot-b; then " \
	"echo fastboot; fastboot 0; fi; " \
	"part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
	"part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
	"mmc dev ${boot_mmc_dev}; " \
	"mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
	"bootm ${kernel_addr_r};"

/*
 * Defaults
 */

#include <config_defaults.h>
#include <config_distro_defaults.h>

#endif
Commit	Line	Data
0257930b	1	/*
39af3d8a	2	* LG Optimus Black codename sniper config
0257930b PK	3	*
	4	* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#include <asm/arch/cpu.h>
	13	#include <asm/arch/omap.h>
	14
	15	/*
	16	* CPU
	17	*/
	18
0257930b	19	#define CONFIG_ARM_ARCH_CP15_ERRATA
0257930b	20
0257930b PK	21	/*
	22	* Board
	23	*/
	24
957efd4b	25	#define CONFIG_MISC_INIT_R
0257930b PK	26
	27	/*
	28	* Clocks
	29	*/
	30
	31	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
	32	#define CONFIG_SYS_PTV 2
	33
	34	#define V_NS16550_CLK 48000000
	35	#define V_OSCK 26000000
	36	#define V_SCLK (V_OSCK >> 1)
	37
	38	/*
	39	* DRAM
	40	*/
	41
0257930b PK	42	#define CONFIG_NR_DRAM_BANKS 2
	43	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	44	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
	45
	46	/*
	47	* Memory
	48	*/
	49
23a004a6 PK	50	#define CONFIG_SYS_SDRAM_BASE 0x80000000
23a004a6 PK	51	#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
0257930b PK	52	GENERATED_GBL_DATA_SIZE)
	53
	54	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
	55
0257930b PK	56	/*
	57	* I2C
	58	*/
	59
	60	#define CONFIG_SYS_I2C
0257930b PK	61	#define CONFIG_I2C_MULTI_BUS
0257930b PK	62
0257930b PK	63	/*
	64	* Input
	65	*/
	66
	67	#define CONFIG_TWL4030_INPUT
	68
0257930b PK	69	/*
	70	* SPL
	71	*/
	72
0257930b	73	#define CONFIG_SPL_TEXT_BASE 0x40200000
fa2f81b0 TR	74	#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
fa2f81b0 TR	75	CONFIG_SPL_TEXT_BASE)
0257930b PK	76	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	77	#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
	78	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	79	#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
	80	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
	81
0257930b PK	82	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	83	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
	84
0257930b	85	#define CONFIG_SYS_CBSIZE 512
0257930b PK	86
	87	/*
	88	* Serial
	89	*/
	90
4fb60552	91	#ifdef CONFIG_SPL_BUILD
0257930b PK	92	#define CONFIG_SYS_NS16550_SERIAL
0257930b PK	93	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
0257930b PK	94	#endif
0257930b PK	95
c7b9686d	96	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
0257930b PK	97	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
0257930b PK	98	#define CONFIG_CONS_INDEX 3
0257930b	99
0257930b PK	100	#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
	101	115200 }
	102
	103	/*
	104	* Environment
	105	*/
	106
	107	#define CONFIG_ENV_SIZE (128 * 1024)
0257930b PK	108
	109	#define CONFIG_ENV_OVERWRITE
	110
	111	#define CONFIG_EXTRA_ENV_SETTINGS \
	112	"kernel_addr_r=0x82000000\0" \
1d3a8664 PK	113	"loadaddr=0x82000000\0" \
	114	"fdt_addr_r=0x88000000\0" \
	115	"fdtaddr=0x88000000\0" \
	116	"ramdisk_addr_r=0x88080000\0" \
	117	"pxefile_addr_r=0x80100000\0" \
	118	"scriptaddr=0x80000000\0" \
	119	"bootm_size=0x10000000\0" \
0257930b PK	120	"boot_mmc_dev=0\0" \
	121	"kernel_mmc_part=3\0" \
	122	"recovery_mmc_part=4\0" \
1d3a8664 PK	123	"fdtfile=omap3-sniper.dtb\0" \
1d3a8664 PK	124	"bootfile=/boot/extlinux/extlinux.conf\0" \
5fcbca52	125	"bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
0257930b PK	126
0257930b PK	127	/*
1d3a8664	128	* ATAGs
0257930b PK	129	*/
0257930b PK	130
0257930b PK	131	#define CONFIG_SETUP_MEMORY_TAGS
	132	#define CONFIG_CMDLINE_TAG
	133	#define CONFIG_INITRD_TAG
	134	#define CONFIG_REVISION_TAG
9f4e1e94	135	#define CONFIG_SERIAL_TAG
0257930b PK	136
	137	/*
	138	* Boot
	139	*/
	140
	141	#define CONFIG_SYS_LOAD_ADDR 0x82000000
0257930b	142
0257930b PK	143	#define CONFIG_BOOTCOMMAND \
0257930b PK	144	"setenv boot_mmc_part ${kernel_mmc_part}; " \
957efd4b PK	145	"if test reboot-${reboot-mode} = reboot-r; then " \
957efd4b PK	146	"echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
fbdd3299 PK	147	"if test reboot-${reboot-mode} = reboot-b; then " \
fbdd3299 PK	148	"echo fastboot; fastboot 0; fi; " \
0257930b PK	149	"part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
	150	"part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
	151	"mmc dev ${boot_mmc_dev}; " \
	152	"mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
	153	"bootm ${kernel_addr_r};"
	154
	155	/*
	156	* Defaults
	157	*/
	158
	159	#include <config_defaults.h>
1d3a8664	160	#include <config_distro_defaults.h>
0257930b PK	161
0257930b PK	162	#endif