[people/ms/u-boot.git] / include / configs / socfpga_arria10_socdk.h

/*
 *  Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
#define __CONFIG_SOCFGPA_ARRIA10_H__

#include <asm/arch/base_addr_a10.h>

/* Booting Linux */
#define CONFIG_LOADADDR		0x01000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/*
 * U-Boot general configurations
 */
/* Cache options */
#define CONFIG_SYS_DCACHE_OFF

/* Memory configurations  */
#define PHYS_SDRAM_1_SIZE		0x40000000

/* Ethernet on SoC (EMAC) */

/*
 * U-Boot environment configurations
 */

/*
 * Serial / UART configurations
 */
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}

/*
 * L4 OSC1 Timer 0
 */
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL			0xFFFFFFFF

/*
 * Flash configurations
 */
#define CONFIG_SYS_MAX_FLASH_BANKS     1

/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>

#endif	/* __CONFIG_SOCFGPA_ARRIA10_H__ */
Commit	Line	Data
1b259403 LFT	1	/*
	2	* Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0
	5	*/
	6
	7	#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
	8	#define __CONFIG_SOCFGPA_ARRIA10_H__
	9
	10	#include <asm/arch/base_addr_a10.h>
91d27a17	11
1b259403 LFT	12	/* Booting Linux */
	13	#define CONFIG_LOADADDR 0x01000000
	14	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	15
	16	/*
	17	* U-Boot general configurations
	18	*/
	19	/* Cache options */
	20	#define CONFIG_SYS_DCACHE_OFF
	21
	22	/* Memory configurations */
	23	#define PHYS_SDRAM_1_SIZE 0x40000000
	24
	25	/* Ethernet on SoC (EMAC) */
1b259403 LFT	26
	27	/*
	28	* U-Boot environment configurations
	29	*/
1b259403	30
1b259403 LFT	31	/*
	32	* Serial / UART configurations
	33	*/
	34	#define CONFIG_SYS_NS16550_MEM32
	35	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
	36
	37	/*
	38	* L4 OSC1 Timer 0
	39	*/
	40	/* reload value when timer count to zero */
	41	#define TIMER_LOAD_VAL 0xFFFFFFFF
	42
	43	/*
	44	* Flash configurations
	45	*/
	46	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	47
	48	/* The rest of the configuration is shared */
	49	#include <configs/socfpga_common.h>
	50
	51	#endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */