[people/ms/u-boot.git] / include / configs / socfpga_arria5_socdk.h

/*
 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __CONFIG_SOCFPGA_ARRIA5_H__
#define __CONFIG_SOCFPGA_ARRIA5_H__

#include <asm/arch/base_addr_ac5.h>

/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_DOS_PARTITION
#define CONFIG_FAT_WRITE
#define CONFIG_HW_WATCHDOG

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DFU
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
#define CONFIG_CMD_USB_MASS_STORAGE

/* Memory configurations */
#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */

/* Booting Linux */
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTFILE		"zImage"
#define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_BOOTCOMMAND	"run ramboot"
#else
#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
#endif
#define CONFIG_LOADADDR		0x01000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
#endif

#define CONFIG_ENV_IS_IN_MMC

/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"verify=n\0" \
	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
		"bootm ${loadaddr} - ${fdt_addr}\0" \
	"bootimage=zImage\0" \
	"fdt_addr=100\0" \
	"fdtimage=socfpga.dtb\0" \
	"bootm ${loadaddr} - ${fdt_addr}\0" \
	"mmcroot=/dev/mmcblk0p2\0" \
	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
		" root=${mmcroot} rw rootwait;" \
		"bootz ${loadaddr} - ${fdt_addr}\0" \
	"mmcload=mmc rescan;" \
		"load mmc 0:1 ${loadaddr} ${bootimage};" \
		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
	"qspiroot=/dev/mtdblock0\0" \
	"qspirootfstype=jffs2\0" \
	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
		"bootm ${loadaddr} - ${fdt_addr}\0" \
	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
		"ubifsload ${loadaddr} /boot/${bootimage} && " \
		"ubifsload ${fdt_addr} /boot/${fdtimage}\0"

/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>

#endif	/* __CONFIG_SOCFPGA_ARRIA5_H__ */
Commit	Line	Data
c115a0d4 MV	1	/*
	2	* Copyright (C) 2014 Marek Vasut <marex@denx.de>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6	#ifndef __CONFIG_SOCFPGA_ARRIA5_H__
	7	#define __CONFIG_SOCFPGA_ARRIA5_H__
	8
871c24bc	9	#include <asm/arch/base_addr_ac5.h>
c115a0d4 MV	10
	11	/* U-Boot Commands */
	12	#define CONFIG_SYS_NO_FLASH
c115a0d4 MV	13	#define CONFIG_DOS_PARTITION
	14	#define CONFIG_FAT_WRITE
	15	#define CONFIG_HW_WATCHDOG
	16
	17	#define CONFIG_CMD_ASKENV
	18	#define CONFIG_CMD_BOOTZ
	19	#define CONFIG_CMD_CACHE
	20	#define CONFIG_CMD_DFU
	21	#define CONFIG_CMD_DHCP
	22	#define CONFIG_CMD_EXT4
	23	#define CONFIG_CMD_EXT4_WRITE
	24	#define CONFIG_CMD_FAT
c115a0d4 MV	25	#define CONFIG_CMD_FS_GENERIC
	26	#define CONFIG_CMD_GREPENV
	27	#define CONFIG_CMD_MII
	28	#define CONFIG_CMD_MMC
c115a0d4	29	#define CONFIG_CMD_PING
c115a0d4 MV	30	#define CONFIG_CMD_USB
	31	#define CONFIG_CMD_USB_MASS_STORAGE
	32
c115a0d4 MV	33	/* Memory configurations */
	34	#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
	35
	36	/* Booting Linux */
	37	#define CONFIG_BOOTDELAY 3
	38	#define CONFIG_BOOTFILE "zImage"
	39	#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
	40	#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
	41	#define CONFIG_BOOTCOMMAND "run ramboot"
	42	#else
	43	#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
	44	#endif
4c6d8b91	45	#define CONFIG_LOADADDR 0x01000000
c115a0d4 MV	46	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	47
	48	/* Ethernet on SoC (EMAC) */
	49	#if defined(CONFIG_CMD_NET)
c115a0d4 MV	50	#define CONFIG_PHY_MICREL
c115a0d4 MV	51	#define CONFIG_PHY_MICREL_KSZ9021
c115a0d4 MV	52	#endif
c115a0d4 MV	53
68a3e32b	54	#define CONFIG_ENV_IS_IN_MMC
68a3e32b	55
c115a0d4	56	/* Extra Environment */
c115a0d4 MV	57	#define CONFIG_EXTRA_ENV_SETTINGS \
	58	"verify=n\0" \
	59	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
	60	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
	61	"bootm ${loadaddr} - ${fdt_addr}\0" \
	62	"bootimage=zImage\0" \
	63	"fdt_addr=100\0" \
	64	"fdtimage=socfpga.dtb\0" \
c115a0d4 MV	65	"bootm ${loadaddr} - ${fdt_addr}\0" \
	66	"mmcroot=/dev/mmcblk0p2\0" \
	67	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
	68	" root=${mmcroot} rw rootwait;" \
	69	"bootz ${loadaddr} - ${fdt_addr}\0" \
	70	"mmcload=mmc rescan;" \
	71	"load mmc 0:1 ${loadaddr} ${bootimage};" \
	72	"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
	73	"qspiroot=/dev/mtdblock0\0" \
	74	"qspirootfstype=jffs2\0" \
	75	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
	76	" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
c26112a7 CLS	77	"bootm ${loadaddr} - ${fdt_addr}\0" \
	78	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
	79	"ubifsload ${loadaddr} /boot/${bootimage} && " \
	80	"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
c115a0d4 MV	81
	82	/* The rest of the configuration is shared */
	83	#include <configs/socfpga_common.h>
	84
	85	#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */