[people/ms/u-boot.git] / include / configs / socfpga_arria5_socdk.h

/*
 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __CONFIG_SOCFPGA_ARRIA5_H__
#define __CONFIG_SOCFPGA_ARRIA5_H__

#include <asm/arch/base_addr_ac5.h>

/* U-Boot Commands */
#define CONFIG_FAT_WRITE
#define CONFIG_HW_WATCHDOG

/* Memory configurations */
#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */

/* Booting Linux */
#define CONFIG_BOOTFILE		"zImage"
#define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_BOOTCOMMAND	"run ramboot"
#else
#define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
#endif
#define CONFIG_LOADADDR		0x01000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
#endif

#define CONFIG_ENV_IS_IN_MMC

/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"verify=n\0" \
	"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
		"bootm ${loadaddr} - ${fdt_addr}\0" \
	"bootimage=zImage\0" \
	"fdt_addr=100\0" \
	"fdtimage=socfpga.dtb\0" \
	"bootm ${loadaddr} - ${fdt_addr}\0" \
	"mmcroot=/dev/mmcblk0p2\0" \
	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
		" root=${mmcroot} rw rootwait;" \
		"bootz ${loadaddr} - ${fdt_addr}\0" \
	"mmcload=mmc rescan;" \
		"load mmc 0:1 ${loadaddr} ${bootimage};" \
		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
	"qspiload=sf probe && mtdparts default && run ubiload\0" \
	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
		" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
		"bootz ${loadaddr} - ${fdt_addr}\0" \
	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
		"ubifsload ${loadaddr} /boot/${bootimage} && " \
		"ubifsload ${fdt_addr} /boot/${fdtimage}\0"

/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>

#endif	/* __CONFIG_SOCFPGA_ARRIA5_H__ */
Commit	Line	Data
c115a0d4 MV	1	/*
	2	* Copyright (C) 2014 Marek Vasut <marex@denx.de>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6	#ifndef __CONFIG_SOCFPGA_ARRIA5_H__
	7	#define __CONFIG_SOCFPGA_ARRIA5_H__
	8
871c24bc	9	#include <asm/arch/base_addr_ac5.h>
c115a0d4 MV	10
c115a0d4 MV	11	/* U-Boot Commands */
c115a0d4 MV	12	#define CONFIG_FAT_WRITE
	13	#define CONFIG_HW_WATCHDOG
	14
c115a0d4 MV	15	/* Memory configurations */
	16	#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
	17
	18	/* Booting Linux */
c115a0d4 MV	19	#define CONFIG_BOOTFILE "zImage"
	20	#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
	21	#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
	22	#define CONFIG_BOOTCOMMAND "run ramboot"
	23	#else
	24	#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
	25	#endif
4c6d8b91	26	#define CONFIG_LOADADDR 0x01000000
c115a0d4 MV	27	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	28
	29	/* Ethernet on SoC (EMAC) */
	30	#if defined(CONFIG_CMD_NET)
c115a0d4 MV	31	#define CONFIG_PHY_MICREL
c115a0d4 MV	32	#define CONFIG_PHY_MICREL_KSZ9021
c115a0d4 MV	33	#endif
c115a0d4 MV	34
68a3e32b	35	#define CONFIG_ENV_IS_IN_MMC
68a3e32b	36
c115a0d4	37	/* Extra Environment */
c115a0d4 MV	38	#define CONFIG_EXTRA_ENV_SETTINGS \
c115a0d4 MV	39	"verify=n\0" \
f6060ce4	40	"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
c115a0d4 MV	41	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
	42	"bootm ${loadaddr} - ${fdt_addr}\0" \
	43	"bootimage=zImage\0" \
	44	"fdt_addr=100\0" \
	45	"fdtimage=socfpga.dtb\0" \
c115a0d4 MV	46	"bootm ${loadaddr} - ${fdt_addr}\0" \
	47	"mmcroot=/dev/mmcblk0p2\0" \
	48	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
	49	" root=${mmcroot} rw rootwait;" \
	50	"bootz ${loadaddr} - ${fdt_addr}\0" \
	51	"mmcload=mmc rescan;" \
	52	"load mmc 0:1 ${loadaddr} ${bootimage};" \
	53	"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
f8e08b8f	54	"qspiload=sf probe && mtdparts default && run ubiload\0" \
c115a0d4	55	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
d6d55cde CLS	56	" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
d6d55cde CLS	57	"bootz ${loadaddr} - ${fdt_addr}\0" \
c26112a7 CLS	58	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
	59	"ubifsload ${loadaddr} /boot/${bootimage} && " \
	60	"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
c115a0d4 MV	61
	62	/* The rest of the configuration is shared */
	63	#include <configs/socfpga_common.h>
	64
	65	#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */