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Commit | Line | Data |
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77754408 | 1 | /* |
5095ee08 | 2 | * Copyright (C) 2014 Marek Vasut <marex@denx.de> |
77754408 | 3 | * |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
77754408 | 5 | */ |
5095ee08 PM |
6 | #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__ |
7 | #define __CONFIG_SOCFPGA_CYCLONE5_H__ | |
77754408 | 8 | |
871c24bc | 9 | #include <asm/arch/base_addr_ac5.h> |
77754408 | 10 | |
47f9b4e1 MV |
11 | /* U-Boot Commands */ |
12 | #define CONFIG_SYS_NO_FLASH | |
47f9b4e1 MV |
13 | #define CONFIG_DOS_PARTITION |
14 | #define CONFIG_FAT_WRITE | |
15 | #define CONFIG_HW_WATCHDOG | |
9ca2116c | 16 | |
47f9b4e1 MV |
17 | #define CONFIG_CMD_ASKENV |
18 | #define CONFIG_CMD_BOOTZ | |
19 | #define CONFIG_CMD_CACHE | |
e5e87179 | 20 | #define CONFIG_CMD_DFU |
47f9b4e1 MV |
21 | #define CONFIG_CMD_DHCP |
22 | #define CONFIG_CMD_EXT4 | |
23 | #define CONFIG_CMD_EXT4_WRITE | |
24 | #define CONFIG_CMD_FAT | |
2f210639 | 25 | #define CONFIG_CMD_FS_GENERIC |
47f9b4e1 MV |
26 | #define CONFIG_CMD_GREPENV |
27 | #define CONFIG_CMD_MII | |
28 | #define CONFIG_CMD_MMC | |
47f9b4e1 | 29 | #define CONFIG_CMD_PING |
e5e87179 MV |
30 | #define CONFIG_CMD_USB |
31 | #define CONFIG_CMD_USB_MASS_STORAGE | |
77754408 | 32 | |
5095ee08 | 33 | /* Memory configurations */ |
47f9b4e1 | 34 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ |
77754408 | 35 | |
47f9b4e1 MV |
36 | /* Booting Linux */ |
37 | #define CONFIG_BOOTDELAY 3 | |
38 | #define CONFIG_BOOTFILE "zImage" | |
116f5d5b | 39 | #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) |
97ce274d | 40 | #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET |
47f9b4e1 | 41 | #define CONFIG_BOOTCOMMAND "run ramboot" |
97ce274d | 42 | #else |
47f9b4e1 | 43 | #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" |
97ce274d | 44 | #endif |
4c6d8b91 | 45 | #define CONFIG_LOADADDR 0x01000000 |
47f9b4e1 | 46 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
77754408 | 47 | |
5095ee08 PM |
48 | /* Ethernet on SoC (EMAC) */ |
49 | #if defined(CONFIG_CMD_NET) | |
47f9b4e1 MV |
50 | #define CONFIG_PHY_MICREL |
51 | #define CONFIG_PHY_MICREL_KSZ9021 | |
31ad864e | 52 | #endif |
77754408 | 53 | |
68a3e32b | 54 | #define CONFIG_ENV_IS_IN_MMC |
68a3e32b | 55 | |
5095ee08 | 56 | /* Extra Environment */ |
47f9b4e1 MV |
57 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
58 | "verify=n\0" \ | |
59 | "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ | |
60 | "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ | |
61 | "bootm ${loadaddr} - ${fdt_addr}\0" \ | |
62 | "bootimage=zImage\0" \ | |
63 | "fdt_addr=100\0" \ | |
64 | "fdtimage=socfpga.dtb\0" \ | |
47f9b4e1 MV |
65 | "bootm ${loadaddr} - ${fdt_addr}\0" \ |
66 | "mmcroot=/dev/mmcblk0p2\0" \ | |
67 | "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ | |
68 | " root=${mmcroot} rw rootwait;" \ | |
69 | "bootz ${loadaddr} - ${fdt_addr}\0" \ | |
70 | "mmcload=mmc rescan;" \ | |
2f210639 MV |
71 | "load mmc 0:1 ${loadaddr} ${bootimage};" \ |
72 | "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ | |
d9f2bd40 | 73 | "qspiload=sf probe && mtdparts default && run ubiload\0" \ |
47f9b4e1 MV |
74 | "qspiroot=/dev/mtdblock0\0" \ |
75 | "qspirootfstype=jffs2\0" \ | |
76 | "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ | |
77 | " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ | |
dc93280d CLS |
78 | "bootm ${loadaddr} - ${fdt_addr}\0" \ |
79 | "ubiload=ubi part UBI && ubifsmount ubi0 && " \ | |
80 | "ubifsload ${loadaddr} /boot/${bootimage} && " \ | |
81 | "ubifsload ${fdt_addr} /boot/${fdtimage}\0" | |
77754408 | 82 | |
5095ee08 PM |
83 | /* The rest of the configuration is shared */ |
84 | #include <configs/socfpga_common.h> | |
05b884b5 | 85 | |
5095ee08 | 86 | #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */ |