[people/ms/u-boot.git] / include / configs / spear-common.h

/*
 * (C) Copyright 2009
 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SPEAR_COMMON_H
#define _SPEAR_COMMON_H
/*
 * Common configurations used for both spear3xx as well as spear6xx
 */

/* U-Boot Load Address */
#define CONFIG_SYS_TEXT_BASE			0x00700000

/* Ethernet driver configuration */
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY			10000		/* in usec */

/* USBD driver configuration */
#if defined(CONFIG_SPEAR_USBTTY)
#define CONFIG_DW_UDC
#define CONFIG_USB_DEVICE
#define CONFIG_USBD_HS
#define CONFIG_USB_TTY

#define CONFIG_USBD_PRODUCT_NAME		"SPEAr SoC"
#define CONFIG_USBD_MANUFACTURER		"ST Microelectronics"

#endif

#define CONFIG_EXTRA_ENV_USBTTY			"usbtty=cdc_acm\0"

/* I2C driver configuration */
#define CONFIG_SYS_I2C
#if defined(CONFIG_SPEAR600)
#define CONFIG_SYS_I2C_BASE			0xD0200000
#elif defined(CONFIG_SPEAR300)
#define CONFIG_SYS_I2C_BASE			0xD0180000
#elif defined(CONFIG_SPEAR310)
#define CONFIG_SYS_I2C_BASE			0xD0180000
#elif defined(CONFIG_SPEAR320)
#define CONFIG_SYS_I2C_BASE			0xD0180000
#endif
#define CONFIG_SYS_I2C_SPEED			400000
#define CONFIG_SYS_I2C_SLAVE			0x02

#define CONFIG_I2C_CHIPADDRESS			0x50

/* Timer, HZ specific defines */

/* Flash configuration */
#if defined(CONFIG_FLASH_PNOR)
#define CONFIG_SPEAR_EMI
#else
#define CONFIG_ST_SMI
#endif

#if defined(CONFIG_ST_SMI)

#define CONFIG_SYS_MAX_FLASH_BANKS		2
#define CONFIG_SYS_FLASH_BASE			0xF8000000
#define CONFIG_SYS_CS1_FLASH_BASE		0xF9000000
#define CONFIG_SYS_FLASH_BANK_SIZE		0x01000000
#define CONFIG_SYS_FLASH_ADDR_BASE		{CONFIG_SYS_FLASH_BASE, \
						CONFIG_SYS_CS1_FLASH_BASE}
#define CONFIG_SYS_MAX_FLASH_SECT		128

#define CONFIG_SYS_FLASH_ERASE_TOUT		(3 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT		(3 * CONFIG_SYS_HZ)

#endif

/*
 * Serial Configuration (PL011)
 * CONFIG_PL01x_PORTS is defined in specific files
 */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK			(48 * 1000 * 1000)
#define CONFIG_CONS_INDEX			0
#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, \
						57600, 115200 }

#define CONFIG_SYS_LOADS_BAUD_CHANGE

/* NAND FLASH Configuration */
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_NAND_FSMC
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_ONFI_DETECTION

/*
 * Default Environment Varible definitions
 */
#define CONFIG_ENV_OVERWRITE

/*
 * U-Boot Environment placing definitions.
 */
#if defined(CONFIG_ENV_IS_IN_FLASH)
#ifdef CONFIG_ST_SMI
/*
 * Environment is in serial NOR flash
 */
#define CONFIG_SYS_MONITOR_LEN			0x00040000
#define CONFIG_ENV_SECT_SIZE			0x00010000
#define CONFIG_FSMTDBLK				"/dev/mtdblock3 "

#define CONFIG_BOOTCOMMAND			"bootm 0xf8050000"

#elif defined(CONFIG_SPEAR_EMI)
/*
 * Environment is in parallel NOR flash
 */
#define CONFIG_SYS_MONITOR_LEN			0x00060000
#define CONFIG_ENV_SECT_SIZE			0x00020000
#define CONFIG_FSMTDBLK				"/dev/mtdblock3 "

#define CONFIG_BOOTCOMMAND			"cp.b 0x50080000 0x1600000 " \
						"0x4C0000; bootm 0x1600000"
#endif

#define CONFIG_ENV_ADDR				(CONFIG_SYS_FLASH_BASE + \
						CONFIG_SYS_MONITOR_LEN)
#elif defined(CONFIG_ENV_IS_IN_NAND)
/*
 * Environment is in NAND
 */

#define CONFIG_ENV_OFFSET			0x60000
#define CONFIG_ENV_RANGE			0x10000
#define CONFIG_FSMTDBLK				"/dev/mtdblock7 "

#define CONFIG_BOOTCOMMAND			"nand read.jffs2 0x1600000 " \
						"0x80000 0x4C0000; " \
						"bootm 0x1600000"
#endif

#define CONFIG_NFSBOOTCOMMAND						\
	"bootp; "							\
	"setenv bootargs root=/dev/nfs rw "				\
	"nfsroot=$(serverip):$(rootpath) "				\
	"ip=$(ipaddr):$(serverip):$(gatewayip):"			\
			"$(netmask):$(hostname):$(netdev):off "		\
			"console=ttyAMA0,115200 $(othbootargs);"	\
	"bootm; "

#define CONFIG_RAMBOOTCOMMAND						\
	"setenv bootargs root=/dev/ram rw "				\
		"console=ttyAMA0,115200 $(othbootargs);"		\
	CONFIG_BOOTCOMMAND

#define CONFIG_ENV_SIZE				0x02000
#define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_TEXT_BASE

/* Miscellaneous configurable options */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOT_PARAMS_ADDR			0x00000100
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_MISC_INIT_R

#define CONFIG_SYS_MEMTEST_START		0x00800000
#define CONFIG_SYS_MEMTEST_END			0x04000000
#define CONFIG_SYS_MALLOC_LEN			(1024*1024)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR			0x00800000

#define CONFIG_SYS_FLASH_EMPTY_INFO

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS			1
#define PHYS_SDRAM_1				0x00000000
#define PHYS_SDRAM_1_MAXSIZE			0x40000000

#define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
#define CONFIG_SYS_INIT_RAM_SIZE		0x2000

#define CONFIG_SYS_INIT_SP_OFFSET		\
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_INIT_SP_ADDR			\
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#endif
Commit	Line	Data
566c9c16 VK	1	/*
	2	* (C) Copyright 2009
	3	* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
566c9c16 VK	6	*/
	7
	8	#ifndef _SPEAR_COMMON_H
	9	#define _SPEAR_COMMON_H
	10	/*
	11	* Common configurations used for both spear3xx as well as spear6xx
	12	*/
	13
a187559e	14	/* U-Boot Load Address */
f273e5b2 VK	15	#define CONFIG_SYS_TEXT_BASE 0x00700000
f273e5b2 VK	16
deb00562 VK	17	/* Ethernet driver configuration */
deb00562 VK	18	#define CONFIG_MII
deb00562 VK	19	#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
deb00562 VK	20
566c9c16	21	/* USBD driver configuration */
b884236e	22	#if defined(CONFIG_SPEAR_USBTTY)
2721551a	23	#define CONFIG_DW_UDC
566c9c16	24	#define CONFIG_USB_DEVICE
50726684	25	#define CONFIG_USBD_HS
566c9c16 VK	26	#define CONFIG_USB_TTY
	27
	28	#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
	29	#define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
	30
b884236e VK	31	#endif
b884236e VK	32
566c9c16 VK	33	#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
	34
	35	/* I2C driver configuration */
678398b1	36	#define CONFIG_SYS_I2C
f93f589c AB	37	#if defined(CONFIG_SPEAR600)
	38	#define CONFIG_SYS_I2C_BASE 0xD0200000
	39	#elif defined(CONFIG_SPEAR300)
	40	#define CONFIG_SYS_I2C_BASE 0xD0180000
	41	#elif defined(CONFIG_SPEAR310)
	42	#define CONFIG_SYS_I2C_BASE 0xD0180000
	43	#elif defined(CONFIG_SPEAR320)
	44	#define CONFIG_SYS_I2C_BASE 0xD0180000
	45	#endif
566c9c16 VK	46	#define CONFIG_SYS_I2C_SPEED 400000
	47	#define CONFIG_SYS_I2C_SLAVE 0x02
	48
	49	#define CONFIG_I2C_CHIPADDRESS 0x50
	50
	51	/* Timer, HZ specific defines */
566c9c16 VK	52
	53	/* Flash configuration */
	54	#if defined(CONFIG_FLASH_PNOR)
9b382b43	55	#define CONFIG_SPEAR_EMI
566c9c16	56	#else
f3fcf92d	57	#define CONFIG_ST_SMI
566c9c16 VK	58	#endif
566c9c16 VK	59
f3fcf92d	60	#if defined(CONFIG_ST_SMI)
566c9c16 VK	61
566c9c16 VK	62	#define CONFIG_SYS_MAX_FLASH_BANKS 2
bc0bdf4c AV	63	#define CONFIG_SYS_FLASH_BASE 0xF8000000
	64	#define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000
	65	#define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000
566c9c16 VK	66	#define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
	67	CONFIG_SYS_CS1_FLASH_BASE}
	68	#define CONFIG_SYS_MAX_FLASH_SECT 128
	69
566c9c16 VK	70	#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
	71	#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
	72
	73	#endif
	74
	75	/*
	76	* Serial Configuration (PL011)
	77	* CONFIG_PL01x_PORTS is defined in specific files
	78	*/
	79	#define CONFIG_PL011_SERIAL
	80	#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
	81	#define CONFIG_CONS_INDEX 0
566c9c16 VK	82	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
	83	57600, 115200 }
	84
	85	#define CONFIG_SYS_LOADS_BAUD_CHANGE
	86
	87	/* NAND FLASH Configuration */
1fa943b9	88	#define CONFIG_SYS_NAND_SELF_INIT
a39fcfb2 SH	89	#define CONFIG_MTD_DEVICE
a39fcfb2 SH	90	#define CONFIG_MTD_PARTITIONS
1fa943b9	91	#define CONFIG_NAND_FSMC
566c9c16	92	#define CONFIG_SYS_MAX_NAND_DEVICE 1
bc912e78	93	#define CONFIG_SYS_NAND_ONFI_DETECTION
566c9c16	94
566c9c16 VK	95	/*
	96	* Default Environment Varible definitions
	97	*/
566c9c16 VK	98	#define CONFIG_ENV_OVERWRITE
	99
	100	/*
	101	* U-Boot Environment placing definitions.
	102	*/
	103	#if defined(CONFIG_ENV_IS_IN_FLASH)
f3fcf92d	104	#ifdef CONFIG_ST_SMI
566c9c16 VK	105	/*
	106	* Environment is in serial NOR flash
	107	*/
	108	#define CONFIG_SYS_MONITOR_LEN 0x00040000
	109	#define CONFIG_ENV_SECT_SIZE 0x00010000
1b7935cd	110	#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
566c9c16 VK	111
	112	#define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
	113
	114	#elif defined(CONFIG_SPEAR_EMI)
	115	/*
	116	* Environment is in parallel NOR flash
	117	*/
	118	#define CONFIG_SYS_MONITOR_LEN 0x00060000
	119	#define CONFIG_ENV_SECT_SIZE 0x00020000
	120	#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
	121
	122	#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
	123	"0x4C0000; bootm 0x1600000"
	124	#endif
	125
0296f159	126	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
566c9c16 VK	127	CONFIG_SYS_MONITOR_LEN)
	128	#elif defined(CONFIG_ENV_IS_IN_NAND)
	129	/*
	130	* Environment is in NAND
	131	*/
	132
	133	#define CONFIG_ENV_OFFSET 0x60000
	134	#define CONFIG_ENV_RANGE 0x10000
1b7935cd	135	#define CONFIG_FSMTDBLK "/dev/mtdblock7 "
566c9c16 VK	136
	137	#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
	138	"0x80000 0x4C0000; " \
	139	"bootm 0x1600000"
	140	#endif
	141
1b7935cd VK	142	#define CONFIG_NFSBOOTCOMMAND \
	143	"bootp; " \
	144	"setenv bootargs root=/dev/nfs rw " \
	145	"nfsroot=$(serverip):$(rootpath) " \
	146	"ip=$(ipaddr):$(serverip):$(gatewayip):" \
	147	"$(netmask):$(hostname):$(netdev):off " \
	148	"console=ttyAMA0,115200 $(othbootargs);" \
	149	"bootm; "
	150
	151	#define CONFIG_RAMBOOTCOMMAND \
	152	"setenv bootargs root=/dev/ram rw " \
	153	"console=ttyAMA0,115200 $(othbootargs);" \
	154	CONFIG_BOOTCOMMAND
	155
566c9c16	156	#define CONFIG_ENV_SIZE 0x02000
0296f159	157	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
566c9c16 VK	158
566c9c16 VK	159	/* Miscellaneous configurable options */
962d026b	160	#define CONFIG_ARCH_CPU_INIT
566c9c16	161	#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
9b382b43 AV	162	#define CONFIG_CMDLINE_TAG
	163	#define CONFIG_SETUP_MEMORY_TAGS
	164	#define CONFIG_MISC_INIT_R
566c9c16 VK	165
	166	#define CONFIG_SYS_MEMTEST_START 0x00800000
	167	#define CONFIG_SYS_MEMTEST_END 0x04000000
	168	#define CONFIG_SYS_MALLOC_LEN (1024*1024)
566c9c16	169	#define CONFIG_SYS_LONGHELP
566c9c16	170	#define CONFIG_CMDLINE_EDITING
566c9c16 VK	171	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
566c9c16 VK	172	#define CONFIG_SYS_LOAD_ADDR 0x00800000
566c9c16	173
cc4b5a34 VK	174	#define CONFIG_SYS_FLASH_EMPTY_INFO
cc4b5a34 VK	175
566c9c16 VK	176	/* Physical Memory Map */
	177	#define CONFIG_NR_DRAM_BANKS 1
	178	#define PHYS_SDRAM_1 0x00000000
	179	#define PHYS_SDRAM_1_MAXSIZE 0x40000000
	180
a39fcfb2 SH	181	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	182	#define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
	183	#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
	184
	185	#define CONFIG_SYS_INIT_SP_OFFSET \
	186	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	187
	188	#define CONFIG_SYS_INIT_SP_ADDR \
	189	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	190
566c9c16	191	#endif