[people/ms/u-boot.git] / include / configs / stv0991.h

/*
 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_STV0991_H
#define __CONFIG_STV0991_H
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH

#define CONFIG_SYS_CORTEX_R4

/* ram memory-related information */
#define CONFIG_NR_DRAM_BANKS			1
#define PHYS_SDRAM_1				0x00000000
#define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
#define PHYS_SDRAM_1_SIZE			0x00198000

#define CONFIG_ENV_SIZE				0x10000
#define CONFIG_ENV_SECT_SIZE			CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET			0x30000
#define CONFIG_ENV_ADDR				\
	(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 16 * 1024)

/* user interface */
#define CONFIG_SYS_CBSIZE			1024

/* MISC */
#define CONFIG_SYS_LOAD_ADDR			0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE		0x8000
#define CONFIG_SYS_INIT_RAM_ADDR		0x00190000
#define CONFIG_SYS_INIT_SP_OFFSET		\
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* U-Boot Load Address */
#define CONFIG_SYS_INIT_SP_ADDR			\
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* GMAC related configs */

#define CONFIG_MII
#define CONFIG_DW_ALTDESCRIPTOR

/* Command support defines */
#define CONFIG_PHY_RESET_DELAY			10000		/* in usec */

#define CONFIG_SYS_MEMTEST_START               0x0000
#define CONFIG_SYS_MEMTEST_END                 1024*1024

/* Misc configuration */

#define CONFIG_BOOTCOMMAND                     "go 0x40040000"

/*
+ * QSPI support
+ */
#ifdef CONFIG_OF_CONTROL		/* QSPI is controlled via DT */
#define CONFIG_CQSPI_REF_CLK		((30/4)/2)*1000*1000

#endif

#endif /* __CONFIG_H */
Commit	Line	Data
9fa32b12	1	/*
1537d386 PC	2	* Copyright (C) 2014, STMicroelectronics - All Rights Reserved
1537d386 PC	3	* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
9fa32b12 VM	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
	8	#ifndef __CONFIG_STV0991_H
	9	#define __CONFIG_STV0991_H
9fa32b12	10	#define CONFIG_SYS_DCACHE_OFF
9fa32b12	11	#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
2ce4eaf4	12
9fa32b12 VM	13	#define CONFIG_SYS_CORTEX_R4
9fa32b12 VM	14
9fa32b12 VM	15	/* ram memory-related information */
	16	#define CONFIG_NR_DRAM_BANKS 1
	17	#define PHYS_SDRAM_1 0x00000000
	18	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	19	#define PHYS_SDRAM_1_SIZE 0x00198000
	20
	21	#define CONFIG_ENV_SIZE 0x10000
137d5b91 VM	22	#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
137d5b91 VM	23	#define CONFIG_ENV_OFFSET 0x30000
9fa32b12 VM	24	#define CONFIG_ENV_ADDR \
9fa32b12 VM	25	(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
9fa32b12 VM	26	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
9fa32b12 VM	27
9fa32b12	28	/* user interface */
c55e7591	29	#define CONFIG_SYS_CBSIZE 1024
9fa32b12 VM	30
	31	/* MISC */
	32	#define CONFIG_SYS_LOAD_ADDR 0x00000000
498b7c2e	33	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
9fa32b12 VM	34	#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
	35	#define CONFIG_SYS_INIT_SP_OFFSET \
	36	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
a187559e	37	/* U-Boot Load Address */
9fa32b12 VM	38	#define CONFIG_SYS_INIT_SP_ADDR \
	39	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	40
2ce4eaf4 VM	41	/* GMAC related configs */
	42
	43	#define CONFIG_MII
2ce4eaf4	44	#define CONFIG_DW_ALTDESCRIPTOR
2ce4eaf4 VM	45
2ce4eaf4 VM	46	/* Command support defines */
2ce4eaf4 VM	47	#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
2ce4eaf4 VM	48
c55e7591 VM	49	#define CONFIG_SYS_MEMTEST_START 0x0000
c55e7591 VM	50	#define CONFIG_SYS_MEMTEST_END 1024*1024
c55e7591 VM	51
c55e7591 VM	52	/* Misc configuration */
c55e7591	53
c55e7591	54	#define CONFIG_BOOTCOMMAND "go 0x40040000"
d126e016	55
e67abcaa VM	56	/*
	57	+ * QSPI support
	58	+ */
	59	#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
e67abcaa	60	#define CONFIG_CQSPI_REF_CLK ((30/4)/2)10001000
e67abcaa	61
e67abcaa VM	62	#endif
e67abcaa VM	63
9fa32b12	64	#endif /* __CONFIG_H */