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1/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
40540823 23#include <linux/sizes.h>
0f8bc283 24
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25#if defined(CONFIG_SPL_BUILD)
26#define CONFIG_SYS_THUMB_BUILD
27#define CONFIG_SYS_ICACHE_OFF
28#define CONFIG_SYS_DCACHE_OFF
29#endif
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30/*
31 * Warning: changing CONFIG_SYS_TEXT_BASE requires
32 * adapting the initial boot program.
33 * Since the linker has to swallow that define, we must use a pure
34 * hex number here!
35 */
36
237e3793 37#define CONFIG_SYS_TEXT_BASE 0x21000000
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38
39/* ARM asynchronous clock */
40#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
41#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
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42
43/* Misc CPU related */
44#define CONFIG_ARCH_CPU_INIT
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
8e6e8221 48#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
0f8bc283 49
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50/* general purpose I/O */
51#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
52#define CONFIG_AT91_GPIO
53#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
54
55/* serial console */
56#define CONFIG_ATMEL_USART
57#define CONFIG_USART_BASE ATMEL_BASE_DBGU
58#define CONFIG_USART_ID ATMEL_ID_SYS
59#define CONFIG_BAUDRATE 115200
60
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61
62/*
63 * Command line configuration.
64 */
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65#define CONFIG_CMD_NAND
66
67/*
68 * SDRAM: 1 bank, min 32, max 128 MB
69 * Initialized before u-boot gets started.
70 */
71#define CONFIG_NR_DRAM_BANKS 1
72#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
0ed366ff 73#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
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74
75/*
76 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
77 * leaving the correct space for initial global data structure above
78 * that address while providing maximum stack area below.
79 */
0ed366ff 80#define CONFIG_SYS_INIT_SP_ADDR \
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81 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
82
83/* NAND flash */
84#ifdef CONFIG_CMD_NAND
85#define CONFIG_NAND_ATMEL
86#define CONFIG_SYS_MAX_NAND_DEVICE 1
87#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
88#define CONFIG_SYS_NAND_DBW_8
89#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
90#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
91#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
92#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
93#endif
94
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95/* Ethernet */
96#define CONFIG_MACB
a212b66d 97#define CONFIG_PHYLIB
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98#define CONFIG_RMII
99#define CONFIG_AT91_WANTS_COMMON_PHY
100
f624162f 101#define CONFIG_AT91SAM9_WATCHDOG
0ed366ff 102#define CONFIG_AT91_HW_WDT_TIMEOUT 15
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103#if !defined(CONFIG_SPL_BUILD)
104/* Enable the watchdog */
105#define CONFIG_HW_WATCHDOG
106#endif
107
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108/* USB */
109#if defined(CONFIG_BOARD_TAURUS)
110#define CONFIG_USB_ATMEL
e8b81eef 111#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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112#define CONFIG_USB_OHCI_NEW
113#define CONFIG_SYS_USB_OHCI_CPU_INIT
114#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
115#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
116#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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117
118/* USB DFU support */
119#define CONFIG_CMD_MTDPARTS
120#define CONFIG_MTD_DEVICE
121#define CONFIG_MTD_PARTITIONS
122
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123#define CONFIG_USB_GADGET_AT91
124
125/* DFU class support */
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126#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
127#define DFU_MANIFEST_POLL_TIMEOUT 25000
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128#endif
129
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130/* SPI EEPROM */
131#define CONFIG_SPI
50921cdc 132#define CONFIG_ATMEL_SPI
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133#define TAURUS_SPI_MASK (1 << 4)
134#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
135
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136#if defined(CONFIG_SPL_BUILD)
137/* SPL related */
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138#define CONFIG_SPL_SPI_LOAD
139#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
140
141#define CONFIG_SF_DEFAULT_BUS 0
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142#define CONFIG_SF_DEFAULT_SPEED 1000000
143#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
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144#endif
145
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146/* load address */
147#define CONFIG_SYS_LOAD_ADDR 0x22000000
148
149/* bootstrap in spi flash , u-boot + env + linux in nandflash */
150#define CONFIG_ENV_IS_IN_NAND
151#define CONFIG_ENV_OFFSET 0x100000
152#define CONFIG_ENV_OFFSET_REDUND 0x180000
0ed366ff 153#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
0f8bc283 154#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
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155
156#if defined(CONFIG_BOARD_TAURUS)
157#define CONFIG_BOOTARGS_TAURUS \
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158 "console=ttyS0,115200 earlyprintk " \
159 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
160 "256k(env),256k(env_redundant),256k(spare)," \
161 "512k(dtb),6M(kernel)ro,-(rootfs) " \
162 "root=/dev/mtdblock7 rw rootfstype=jffs2"
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163#endif
164
165#if defined(CONFIG_BOARD_AXM)
166#define CONFIG_BOOTARGS_AXM \
167 "\0" \
168 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
169 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
170 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
171 "baudrate=115200\0" \
172 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
173 "boot_retries=0\0" \
174 "bootcmd=run flash_self\0" \
175 "bootdelay=3\0" \
176 "ethact=macb0\0" \
177 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
178 "bootm ${kernel_ram};reset\0" \
179 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
180 "bootm ${kernel_ram};reset\0" \
181 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
182 "upgrade_available;bootm ${kernel_ram};reset\0" \
183 "hostname=systemone\0" \
184 "kernel_Off=0x00200000\0" \
185 "kernel_Off_fallback=0x03800000\0" \
186 "kernel_ram=0x21500000\0" \
187 "kernel_size=0x00400000\0" \
188 "kernel_size_fallback=0x00400000\0" \
189 "loads_echo=1\0" \
190 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
191 "${kernel_size}\0" \
192 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
193 "run nfsargs;run addip;upgrade_available;bootm " \
194 "${kernel_ram};reset\0" \
195 "netdev=eth0\0" \
196 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
197 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
198 "at91sam9_wdt.wdt_timeout=16\0" \
199 "partitionset_active=A\0" \
200 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
201 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
202 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
203 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
204 "project_dir=systemone\0" \
205 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
206 "rootfs=/dev/mtdblock5\0" \
207 "rootfs_fallback=/dev/mtdblock7\0" \
208 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
209 "root=${rootfs} rootfstype=jffs2 panic=7 " \
210 "at91sam9_wdt.wdt_timeout=16\0" \
211 "stderr=serial\0" \
212 "stdin=serial\0" \
213 "stdout=serial\0" \
214 "upgrade_available=0\0"
215#endif
216
217#if defined(CONFIG_BOARD_TAURUS)
218#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
219#endif
220
221#if defined(CONFIG_BOARD_AXM)
222#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
223#endif
0f8bc283 224
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225#define CONFIG_SYS_CBSIZE 256
226#define CONFIG_SYS_MAXARGS 16
227#define CONFIG_SYS_PBSIZE \
228 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
229#define CONFIG_SYS_LONGHELP
230#define CONFIG_CMDLINE_EDITING
231#define CONFIG_AUTO_COMPLETE
232
233/*
234 * Size of malloc() pool
235 */
236#define CONFIG_SYS_MALLOC_LEN \
e8b81eef 237 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
0f8bc283 238
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239/* Defines for SPL */
240#define CONFIG_SPL_FRAMEWORK
241#define CONFIG_SPL_TEXT_BASE 0x0
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242#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
243#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
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244#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
245 CONFIG_SYS_MALLOC_LEN)
246#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
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247
248#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
0ed366ff 249#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
237e3793 250
237e3793 251#define CONFIG_SPL_BOARD_INIT
237e3793 252#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
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253#define CONFIG_SYS_USE_NANDFLASH 1
254#define CONFIG_SPL_NAND_DRIVERS
255#define CONFIG_SPL_NAND_BASE
256#define CONFIG_SPL_NAND_ECC
257#define CONFIG_SPL_NAND_RAW_ONLY
258#define CONFIG_SPL_NAND_SOFTECC
259#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
e8b81eef 260#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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261#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
262#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
263#define CONFIG_SYS_NAND_5_ADDR_CYCLE
264
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265#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
266#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
267#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
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268#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
269 CONFIG_SYS_NAND_PAGE_SIZE)
270#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
271#define CONFIG_SYS_NAND_ECCSIZE 256
272#define CONFIG_SYS_NAND_ECCBYTES 3
273#define CONFIG_SYS_NAND_OOBSIZE 64
274#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
275 48, 49, 50, 51, 52, 53, 54, 55, \
276 56, 57, 58, 59, 60, 61, 62, 63, }
277
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278#define CONFIG_SPL_ATMEL_SIZE
279#define CONFIG_SYS_MASTER_CLOCK 132096000
280#define AT91_PLL_LOCK_TIMEOUT 1000000
281#define CONFIG_SYS_AT91_PLLA 0x202A3F01
282#define CONFIG_SYS_MCKR 0x1300
283#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
284#define CONFIG_SYS_AT91_PLLB 0x10193F05
40540823 285
0f8bc283 286#endif