[people/ms/u-boot.git] / include / configs / tegra-common.h

/*
 *  (C) Copyright 2010-2012
 *  NVIDIA Corporation <www.nvidia.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _TEGRA_COMMON_H_
#define _TEGRA_COMMON_H_
#include <linux/sizes.h>
#include <linux/stringify.h>

/*
 * High Level Configuration Options
 */
#define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
#define CONFIG_TEGRA			/* which is a Tegra generic machine */
#define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */

#include <asm/arch/tegra.h>		/* get chip and board defs */

#define CONFIG_DM
#define CONFIG_CMD_DM

#define CONFIG_SYS_TIMER_RATE		1000000
#define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE

/*
 * Display CPU and Board information
 */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */

/* Environment */
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(4 << 20)	/* 4MB  */

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * Common HW configuration.
 * If this varies between SoCs later, move to tegraNN-common.h
 * Note: This is number of devices, not max device ID.
 */
#define CONFIG_SYS_MMC_MAX_DEVICE 4

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX	1

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE			115200

/* include default commands */
#include <config_cmd_default.h>

/* remove unused commands */
#undef CONFIG_CMD_FLASH		/* flinfo, erase, protect */
#undef CONFIG_CMD_FPGA		/* FPGA configuration support */
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NFS		/* NFS support */
#undef CONFIG_CMD_NET		/* network support */

/* turn on command-line edit/hist/auto */
#define CONFIG_COMMAND_HISTORY

/* turn on commonly used storage-related commands */
#define CONFIG_PARTITION_UUIDS
#define CONFIG_CMD_PART

#define CONFIG_SYS_NO_FLASH

#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_PROMPT		V_PROMPT
/*
 * Increasing the size of the IO buffer as default nfsargs size is more
 *  than 256 and so it is not possible to edit it
 */
#define CONFIG_SYS_CBSIZE		(256 * 2) /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

#define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		NV_PA_SDRC_CS0
#define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1

#define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */

#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
						CONFIG_SYS_INIT_RAM_SIZE - \
						GENERATED_GBL_DATA_SIZE)

#define CONFIG_TEGRA_GPIO
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_ENTERRCM

/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_RAM_DEVICE
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
						CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT

#ifdef CONFIG_SPL_BUILD
# define CONFIG_USE_PRIVATE_LIBGCC
#endif

#define CONFIG_SYS_GENERIC_BOARD

/* Misc utility code */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CRC32_VERIFY

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>
#endif

#endif /* _TEGRA_COMMON_H_ */
Commit	Line	Data
f01b631f TW	1	/*
	2	* (C) Copyright 2010-2012
	3	* NVIDIA Corporation <www.nvidia.com>
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
f01b631f TW	6	*/
f01b631f TW	7
bfcf46db TW	8	#ifndef _TEGRA_COMMON_H_
bfcf46db TW	9	#define _TEGRA_COMMON_H_
1ace4022	10	#include <linux/sizes.h>
f01b631f TW	11	#include <linux/stringify.h>
	12
	13	/*
	14	* High Level Configuration Options
	15	*/
	16	#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
	17	#define CONFIG_TEGRA /* which is a Tegra generic machine */
	18	#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
	19
f01b631f TW	20	#include <asm/arch/tegra.h> /* get chip and board defs */
f01b631f TW	21
47f3d3c8 SG	22	#define CONFIG_DM
	23	#define CONFIG_CMD_DM
	24
31df9893 RH	25	#define CONFIG_SYS_TIMER_RATE 1000000
	26	#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
	27
f01b631f TW	28	/*
	29	* Display CPU and Board information
	30	*/
	31	#define CONFIG_DISPLAY_CPUINFO
	32	#define CONFIG_DISPLAY_BOARDINFO
	33
	34	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
f01b631f TW	35
	36	/* Environment */
	37	#define CONFIG_ENV_VARS_UBOOT_CONFIG
	38	#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
	39
	40	/*
	41	* Size of malloc() pool
	42	*/
	43	#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
	44
	45	/*
bfcf46db	46	* NS16550 Configuration
f01b631f	47	*/
f01b631f TW	48	#define CONFIG_SYS_NS16550
	49	#define CONFIG_SYS_NS16550_SERIAL
	50	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	51	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	52
f175603f SW	53	/*
	54	* Common HW configuration.
	55	* If this varies between SoCs later, move to tegraNN-common.h
	56	* Note: This is number of devices, not max device ID.
	57	*/
	58	#define CONFIG_SYS_MMC_MAX_DEVICE 4
	59
f01b631f TW	60	/*
	61	* select serial console configuration
	62	*/
	63	#define CONFIG_CONS_INDEX 1
	64
	65	/* allow to overwrite serial and ethaddr */
	66	#define CONFIG_ENV_OVERWRITE
	67	#define CONFIG_BAUDRATE 115200
	68
	69	/* include default commands */
	70	#include <config_cmd_default.h>
	71
	72	/* remove unused commands */
	73	#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
	74	#undef CONFIG_CMD_FPGA /* FPGA configuration support */
	75	#undef CONFIG_CMD_IMI
	76	#undef CONFIG_CMD_IMLS
	77	#undef CONFIG_CMD_NFS /* NFS support */
	78	#undef CONFIG_CMD_NET /* network support */
	79
	80	/* turn on command-line edit/hist/auto */
f01b631f	81	#define CONFIG_COMMAND_HISTORY
f01b631f	82
11d9c030	83	/* turn on commonly used storage-related commands */
11d9c030	84	#define CONFIG_PARTITION_UUIDS
11d9c030 SW	85	#define CONFIG_CMD_PART
11d9c030 SW	86
f01b631f TW	87	#define CONFIG_SYS_NO_FLASH
	88
	89	#define CONFIG_CONSOLE_MUX
	90	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
f01b631f TW	91
	92	/*
	93	* Miscellaneous configurable options
	94	*/
f01b631f TW	95	#define CONFIG_SYS_PROMPT V_PROMPT
	96	/*
	97	* Increasing the size of the IO buffer as default nfsargs size is more
	98	* than 256 and so it is not possible to edit it
	99	*/
	100	#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
	101	/* Print Buffer Size */
	102	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	103	sizeof(CONFIG_SYS_PROMPT) + 16)
	104	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	105	/* Boot Argument Buffer Size */
	106	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	107
	108	#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
	109	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
	110
f01b631f TW	111	/*-----------------------------------------------------------------------
	112	* Physical Memory Map
	113	*/
	114	#define CONFIG_NR_DRAM_BANKS 1
	115	#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
	116	#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
	117
	118	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
	119	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	120
	121	#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
	122
	123	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
	124	#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
	125	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	126	CONFIG_SYS_INIT_RAM_SIZE - \
	127	GENERATED_GBL_DATA_SIZE)
	128
	129	#define CONFIG_TEGRA_GPIO
	130	#define CONFIG_CMD_GPIO
	131	#define CONFIG_CMD_ENTERRCM
f01b631f TW	132
f01b631f TW	133	/* Defines for SPL */
f01b631f TW	134	#define CONFIG_SPL_FRAMEWORK
	135	#define CONFIG_SPL_RAM_DEVICE
	136	#define CONFIG_SPL_BOARD_INIT
	137	#define CONFIG_SPL_NAND_SIMPLE
6ebc3461	138	#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
f01b631f TW	139	CONFIG_SPL_TEXT_BASE)
	140	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
	141
	142	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	143	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	144	#define CONFIG_SPL_SERIAL_SUPPORT
	145	#define CONFIG_SPL_GPIO_SUPPORT
	146
cd2e46cb MY	147	#ifdef CONFIG_SPL_BUILD
	148	# define CONFIG_USE_PRIVATE_LIBGCC
	149	#endif
	150
dd7f65f6	151	#define CONFIG_SYS_GENERIC_BOARD
3efff99f	152
a885f852 SW	153	/* Misc utility code */
a885f852 SW	154	#define CONFIG_BOUNCE_BUFFER
3efff99f	155	#define CONFIG_CRC32_VERIFY
dd7f65f6	156
68cf64db SW	157	#ifndef CONFIG_SPL_BUILD
	158	#include <config_distro_defaults.h>
	159	#endif
	160
f01b631f	161	#endif /* _TEGRA_COMMON_H_ */