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arm: tegra: initial support for apalis t30
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1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
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8#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
1ace4022 10#include <linux/sizes.h>
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11#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
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17#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
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19#include <asm/arch/tegra.h> /* get chip and board defs */
20
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21#define CONFIG_DM
22#define CONFIG_CMD_DM
2fccd2d9 23#define CONFIG_DM_GPIO
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24#ifndef CONFIG_SPL_BUILD
25#define CONFIG_DM_SERIAL
26#endif
47f3d3c8 27
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28#define CONFIG_SYS_TIMER_RATE 1000000
29#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
30
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31/*
32 * Display CPU and Board information
33 */
34#define CONFIG_DISPLAY_CPUINFO
35#define CONFIG_DISPLAY_BOARDINFO
36
37#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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38
39/* Environment */
40#define CONFIG_ENV_VARS_UBOOT_CONFIG
41#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
42
43/*
44 * Size of malloc() pool
45 */
46#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
a4741111 47#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
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48
49/*
bfcf46db 50 * NS16550 Configuration
f01b631f 51 */
858530a8 52#ifdef CONFIG_SPL_BUILD
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53#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE (-4)
55#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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56#else
57#define CONFIG_TEGRA_SERIAL
58#endif
59#define CONFIG_SYS_NS16550
f01b631f 60
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61/*
62 * Common HW configuration.
63 * If this varies between SoCs later, move to tegraNN-common.h
64 * Note: This is number of devices, not max device ID.
65 */
66#define CONFIG_SYS_MMC_MAX_DEVICE 4
67
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68/*
69 * select serial console configuration
70 */
71#define CONFIG_CONS_INDEX 1
72
73/* allow to overwrite serial and ethaddr */
74#define CONFIG_ENV_OVERWRITE
75#define CONFIG_BAUDRATE 115200
76
77/* include default commands */
78#include <config_cmd_default.h>
79
80/* remove unused commands */
81#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
82#undef CONFIG_CMD_FPGA /* FPGA configuration support */
83#undef CONFIG_CMD_IMI
84#undef CONFIG_CMD_IMLS
85#undef CONFIG_CMD_NFS /* NFS support */
86#undef CONFIG_CMD_NET /* network support */
87
88/* turn on command-line edit/hist/auto */
f01b631f 89#define CONFIG_COMMAND_HISTORY
f01b631f 90
11d9c030 91/* turn on commonly used storage-related commands */
11d9c030 92#define CONFIG_PARTITION_UUIDS
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93#define CONFIG_CMD_PART
94
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95#define CONFIG_SYS_NO_FLASH
96
97#define CONFIG_CONSOLE_MUX
98#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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99
100/*
101 * Miscellaneous configurable options
102 */
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103#define CONFIG_SYS_PROMPT V_PROMPT
104/*
105 * Increasing the size of the IO buffer as default nfsargs size is more
106 * than 256 and so it is not possible to edit it
107 */
108#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
109/* Print Buffer Size */
110#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
111 sizeof(CONFIG_SYS_PROMPT) + 16)
112#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
113/* Boot Argument Buffer Size */
114#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
115
116#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
117#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
118
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119/*-----------------------------------------------------------------------
120 * Physical Memory Map
121 */
122#define CONFIG_NR_DRAM_BANKS 1
123#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
124#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
125
126#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
127#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
128
129#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
130
131#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
132#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
133#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
134 CONFIG_SYS_INIT_RAM_SIZE - \
135 GENERATED_GBL_DATA_SIZE)
136
137#define CONFIG_TEGRA_GPIO
138#define CONFIG_CMD_GPIO
139#define CONFIG_CMD_ENTERRCM
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140
141/* Defines for SPL */
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142#define CONFIG_SPL_FRAMEWORK
143#define CONFIG_SPL_RAM_DEVICE
144#define CONFIG_SPL_BOARD_INIT
145#define CONFIG_SPL_NAND_SIMPLE
6ebc3461 146#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
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147 CONFIG_SPL_TEXT_BASE)
148#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
149
150#define CONFIG_SPL_LIBCOMMON_SUPPORT
151#define CONFIG_SPL_LIBGENERIC_SUPPORT
152#define CONFIG_SPL_SERIAL_SUPPORT
153#define CONFIG_SPL_GPIO_SUPPORT
154
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155#ifdef CONFIG_SPL_BUILD
156# define CONFIG_USE_PRIVATE_LIBGCC
157#endif
158
dd7f65f6 159#define CONFIG_SYS_GENERIC_BOARD
3efff99f 160
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161/* Misc utility code */
162#define CONFIG_BOUNCE_BUFFER
3efff99f 163#define CONFIG_CRC32_VERIFY
dd7f65f6 164
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165#ifndef CONFIG_SPL_BUILD
166#include <config_distro_defaults.h>
167#endif
168
f01b631f 169#endif /* _TEGRA_COMMON_H_ */