[people/ms/u-boot.git] / include / configs / tegra210-common.h

/*
 * (C) Copyright 2013-2015
 * NVIDIA Corporation <www.nvidia.com>
 *
 * SPDX-License-Identifier:     GPL-2.0+
 */

#ifndef _TEGRA210_COMMON_H_
#define _TEGRA210_COMMON_H_

#include "tegra-common.h"

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_SYS_TEXT_BASE	0x80110000

/* Generic Interrupt Controller */
#define CONFIG_GICV2

/*
 * Memory layout for where various images get loaded by boot scripts:
 *
 * scriptaddr can be pretty much anywhere that doesn't conflict with something
 *   else. Put it above BOOTMAPSZ to eliminate conflicts.
 *
 * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
 *   something else. Put it above BOOTMAPSZ to eliminate conflicts.
 *
 * kernel_addr_r must be within the first 128M of RAM in order for the
 *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
 *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
 *   should not overlap that area, or the kernel will have to copy itself
 *   somewhere else before decompression. Similarly, the address of any other
 *   data passed to the kernel shouldn't overlap the start of RAM. Pushing
 *   this up to 16M allows for a sizable kernel to be decompressed below the
 *   compressed load address.
 *
 * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
 *   the compressed kernel to be up to 16M too.
 *
 * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
 *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
 */
#define CONFIG_LOADADDR 0x80080000
#define MEM_LAYOUT_ENV_SETTINGS \
	"scriptaddr=0x90000000\0" \
	"pxefile_addr_r=0x90100000\0" \
	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	"fdt_addr_r=0x82000000\0" \
	"ramdisk_addr_r=0x82100000\0"

/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10

/* GPU needs setup */
#define CONFIG_TEGRA_GPU

#endif /* _TEGRA210_COMMON_H_ */
Commit	Line	Data
873e3ef9 TW	1	/*
	2	* (C) Copyright 2013-2015
	3	* NVIDIA Corporation <www.nvidia.com>
	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
	8	#ifndef _TEGRA210_COMMON_H_
	9	#define _TEGRA210_COMMON_H_
	10
	11	#include "tegra-common.h"
	12
873e3ef9 TW	13	/*
	14	* NS16550 Configuration
	15	*/
	16	#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
	17
873e3ef9 TW	18	/*-----------------------------------------------------------------------
	19	* Physical Memory Map
	20	*/
930c514d	21	#define CONFIG_SYS_TEXT_BASE 0x80110000
873e3ef9 TW	22
	23	/* Generic Interrupt Controller */
	24	#define CONFIG_GICV2
	25
	26	/*
	27	* Memory layout for where various images get loaded by boot scripts:
	28	*
	29	* scriptaddr can be pretty much anywhere that doesn't conflict with something
	30	* else. Put it above BOOTMAPSZ to eliminate conflicts.
	31	*
	32	* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
	33	* something else. Put it above BOOTMAPSZ to eliminate conflicts.
	34	*
	35	* kernel_addr_r must be within the first 128M of RAM in order for the
	36	* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
	37	* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
	38	* should not overlap that area, or the kernel will have to copy itself
	39	* somewhere else before decompression. Similarly, the address of any other
	40	* data passed to the kernel shouldn't overlap the start of RAM. Pushing
	41	* this up to 16M allows for a sizable kernel to be decompressed below the
	42	* compressed load address.
	43	*
	44	* fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
	45	* the compressed kernel to be up to 16M too.
	46	*
	47	* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
	48	* for the FDT/DTB to be up to 1M, which is hopefully plenty.
	49	*/
a8903167	50	#define CONFIG_LOADADDR 0x80080000
873e3ef9 TW	51	#define MEM_LAYOUT_ENV_SETTINGS \
	52	"scriptaddr=0x90000000\0" \
	53	"pxefile_addr_r=0x90100000\0" \
	54	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	55	"fdt_addr_r=0x82000000\0" \
	56	"ramdisk_addr_r=0x82100000\0"
	57
873e3ef9 TW	58	/* For USB EHCI controller */
	59	#define CONFIG_EHCI_IS_TDI
	60	#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
873e3ef9	61
871d78ed AC	62	/* GPU needs setup */
	63	#define CONFIG_TEGRA_GPU
	64
873e3ef9	65	#endif /* _TEGRA210_COMMON_H_ */