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87694558 TR |
1 | /* |
2 | * ti_am335x_common.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | * | |
8 | * For more details, please see the technical documents listed at | |
9 | * http://www.ti.com/product/am3359#technicaldocuments | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_TI_AM335X_COMMON_H__ | |
13 | #define __CONFIG_TI_AM335X_COMMON_H__ | |
14 | ||
15 | #define CONFIG_AM33XX | |
87694558 TR |
16 | #define CONFIG_ARCH_CPU_INIT |
17 | #define CONFIG_SYS_CACHELINE_SIZE 64 | |
18 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ | |
19 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ | |
16678eb4 | 20 | #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC |
87694558 TR |
21 | |
22 | #include <asm/arch/omap.h> | |
23 | ||
24 | /* NS16550 Configuration */ | |
1a44cd89 | 25 | #ifdef CONFIG_SPL_BUILD |
87694558 TR |
26 | #define CONFIG_SYS_NS16550_SERIAL |
27 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
1a44cd89 | 28 | #endif |
87694558 TR |
29 | #define CONFIG_SYS_NS16550_CLK 48000000 |
30 | ||
31 | /* Network defines. */ | |
87694558 | 32 | #define CONFIG_CMD_DHCP |
a35ad51e | 33 | #define CONFIG_CMD_MII |
a7a06400 | 34 | #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ |
87694558 TR |
35 | #define CONFIG_BOOTP_DNS2 |
36 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
37 | #define CONFIG_BOOTP_GATEWAY | |
38 | #define CONFIG_BOOTP_SUBNETMASK | |
39 | #define CONFIG_NET_RETRY_COUNT 10 | |
a7a06400 TR |
40 | #define CONFIG_CMD_PING |
41 | #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ | |
42 | #define CONFIG_MII /* Required in net/eth.c */ | |
87694558 | 43 | |
a1c143f4 TR |
44 | /* |
45 | * RTC related defines. To use bootcount you must set bootlimit in the | |
abcaa6ee TR |
46 | * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT |
47 | * in the board config. | |
a1c143f4 | 48 | */ |
a1c143f4 TR |
49 | #define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000 |
50 | ||
6843918e TR |
51 | /* Enable the HW watchdog, since we can use this with bootcount */ |
52 | #define CONFIG_HW_WATCHDOG | |
53 | #define CONFIG_OMAP_WATCHDOG | |
54 | ||
c27efde6 TR |
55 | /* |
56 | * SPL related defines. The Public RAM memory map the ROM defines the | |
57 | * area between 0x402F0400 and 0x4030B800 as a download area and | |
58 | * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also | |
59 | * supports X-MODEM loading via UART, and we leverage this and then use | |
60 | * Y-MODEM to load u-boot.img, when booted over UART. | |
61 | */ | |
87694558 | 62 | #define CONFIG_SPL_TEXT_BASE 0x402F0400 |
c27efde6 | 63 | #define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) |
d3289aac TR |
64 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
65 | (128 << 20)) | |
87694558 | 66 | |
6843918e TR |
67 | /* Enable the watchdog inside of SPL */ |
68 | #define CONFIG_SPL_WATCHDOG_SUPPORT | |
69 | ||
87694558 TR |
70 | /* |
71 | * Since SPL did pll and ddr initialization for us, | |
72 | * we don't need to do it twice. | |
73 | */ | |
74 | #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) | |
75 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
76 | #endif | |
77 | ||
196311dc TR |
78 | /* |
79 | * When building U-Boot such that there is no previous loader | |
80 | * we need to call board_early_init_f. This is taken care of in | |
81 | * s_init when we have SPL used. | |
82 | */ | |
83 | #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL) | |
84 | #define CONFIG_BOARD_EARLY_INIT_F | |
85 | #endif | |
86 | ||
70e71b61 EBS |
87 | #ifdef CONFIG_NAND |
88 | #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ | |
89 | #endif | |
90 | ||
87694558 | 91 | /* Now bring in the rest of the common code. */ |
9a0f4004 | 92 | #include <configs/ti_armv7_omap.h> |
87694558 TR |
93 | |
94 | #endif /* __CONFIG_TI_AM335X_COMMON_H__ */ |