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87694558 TR |
1 | /* |
2 | * ti_armv7_common.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | * | |
8 | * The various ARMv7 SoCs from TI all share a number of IP blocks when | |
9 | * implementing a given feature. Rather than define these in every | |
10 | * board or even SoC common file, we define a common file to be re-used | |
11 | * in all cases. While technically true that some of these details are | |
12 | * configurable at the board design, they are common throughout SoC | |
13 | * reference platforms as well as custom designs and become de facto | |
14 | * standards. | |
15 | */ | |
16 | ||
17 | #ifndef __CONFIG_TI_ARMV7_COMMON_H__ | |
18 | #define __CONFIG_TI_ARMV7_COMMON_H__ | |
19 | ||
20 | /* Common define for many platforms. */ | |
21 | #define CONFIG_OMAP | |
22 | #define CONFIG_OMAP_COMMON | |
23 | ||
24 | /* | |
25 | * We typically do not contain NOR flash. In the cases where we do, we | |
26 | * undefine this later. | |
27 | */ | |
28 | #define CONFIG_SYS_NO_FLASH | |
29 | ||
30 | /* Support both device trees and ATAGs. */ | |
31 | #define CONFIG_OF_LIBFDT | |
32 | #define CONFIG_CMDLINE_TAG | |
33 | #define CONFIG_SETUP_MEMORY_TAGS | |
34 | #define CONFIG_INITRD_TAG | |
35 | ||
36 | /* | |
37 | * Our DDR memory always starts at 0x80000000 and U-Boot shall have | |
38 | * relocated itself to higher in memory by the time this value is used. | |
39 | */ | |
40 | #define CONFIG_SYS_LOAD_ADDR 0x80000000 | |
41 | ||
42 | /* | |
43 | * Default to a quick boot delay. | |
44 | */ | |
45 | #define CONFIG_BOOTDELAY 1 | |
46 | ||
47 | /* | |
48 | * DDR information. We say (for simplicity) that we have 1 bank, | |
49 | * always, even when we have more. We always start at 0x80000000, | |
50 | * and we place the initial stack pointer in our SRAM. | |
51 | */ | |
52 | #define CONFIG_NR_DRAM_BANKS 1 | |
53 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
54 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ | |
55 | GENERATED_GBL_DATA_SIZE) | |
56 | ||
57 | /* Timer information. */ | |
58 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
59 | #define CONFIG_SYS_HZ 1000 /* 1ms clock */ | |
60 | ||
61 | /* I2C IP block */ | |
62 | #define CONFIG_I2C | |
63 | #define CONFIG_CMD_I2C | |
64 | #define CONFIG_HARD_I2C | |
65 | #define CONFIG_SYS_I2C_SPEED 100000 | |
66 | #define CONFIG_SYS_I2C_SLAVE 1 | |
67 | #define CONFIG_I2C_MULTI_BUS | |
68 | #define CONFIG_DRIVER_OMAP24XX_I2C | |
69 | ||
70 | /* MMC/SD IP block */ | |
71 | #define CONFIG_MMC | |
72 | #define CONFIG_GENERIC_MMC | |
73 | #define CONFIG_OMAP_HSMMC | |
74 | #define CONFIG_CMD_MMC | |
75 | ||
76 | /* McSPI IP block */ | |
77 | #define CONFIG_SPI | |
78 | #define CONFIG_OMAP3_SPI | |
0fedc4a5 | 79 | #define CONFIG_CMD_SPI |
87694558 TR |
80 | |
81 | /* GPIO block */ | |
82 | #define CONFIG_OMAP_GPIO | |
a1665ed1 | 83 | #define CONFIG_CMD_GPIO |
87694558 TR |
84 | |
85 | /* | |
86 | * GPMC NAND block. We support 1 device and the physical address to | |
87 | * access CS0 at is 0x8000000. | |
88 | */ | |
89 | #ifdef CONFIG_NAND | |
90 | #define CONFIG_CMD_NAND | |
91 | #define CONFIG_NAND_OMAP_GPMC | |
92 | #define CONFIG_SYS_NAND_BASE 0x8000000 | |
93 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
94 | #endif | |
95 | ||
96 | /* | |
97 | * The following are general good-enough settings for U-Boot. We set a | |
98 | * large malloc pool as we generally have a lot of DDR, and we opt for | |
99 | * function over binary size in the main portion of U-Boot as this is | |
100 | * generally easily constrained later if needed. We enable the config | |
101 | * options that give us information in the environment about what board | |
102 | * we are on so we do not need to rely on the command prompt. We set a | |
103 | * console baudrate of 115200 and use the default baud rate table. | |
104 | */ | |
105 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) | |
106 | #define CONFIG_SYS_LONGHELP | |
107 | #define CONFIG_SYS_HUSH_PARSER | |
108 | #define CONFIG_AUTO_COMPLETE | |
109 | #define CONFIG_CMDLINE_EDITING | |
110 | #define CONFIG_SYS_PROMPT "U-Boot# " | |
111 | #define CONFIG_VERSION_VARIABLE | |
112 | #define CONFIG_ENV_VARS_UBOOT_CONFIG | |
113 | #define CONFIG_BAUDRATE 115200 | |
114 | ||
115 | /* We set the max number of command args high to avoid HUSH bugs. */ | |
116 | #define CONFIG_SYS_MAXARGS 64 | |
117 | ||
118 | /* Console I/O Buffer Size */ | |
119 | #define CONFIG_SYS_CBSIZE 512 | |
120 | /* Print Buffer Size */ | |
121 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
122 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
123 | /* Boot Argument Buffer Size */ | |
124 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
125 | ||
126 | #define CONFIG_ENV_OVERWRITE | |
127 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
128 | ||
129 | /* | |
130 | * When we have SPI, NOR or NAND flash we expect to be making use of | |
131 | * mtdparts, both for ease of use in U-Boot and for passing information | |
132 | * on to the Linux kernel. | |
133 | */ | |
134 | #if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) | |
135 | #define CONFIG_MTD_DEVICE /* Required for mtdparts */ | |
136 | #define CONFIG_CMD_MTDPARTS | |
137 | #endif | |
138 | ||
139 | /* | |
140 | * For commands to use, we take the default list and add a few other | |
141 | * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH | |
142 | * prior to this include, in order to skip a few commands. When we do | |
143 | * have flash, if we expect these commands they must be enabled in that | |
144 | * config. | |
145 | */ | |
146 | #include <config_cmd_default.h> | |
147 | #define CONFIG_CMD_ASKENV | |
148 | #define CONFIG_CMD_ECHO | |
149 | #define CONFIG_CMD_BOOTZ | |
150 | ||
151 | /* | |
152 | * Common filesystems support. When we have removable storage we | |
153 | * enabled a number of useful commands and support. | |
154 | */ | |
155 | #if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) | |
156 | #define CONFIG_DOS_PARTITION | |
157 | #define CONFIG_CMD_FAT | |
158 | #define CONFIG_FAT_WRITE | |
159 | #define CONFIG_CMD_EXT2 | |
160 | #define CONFIG_CMD_EXT4 | |
161 | #define CONFIG_CMD_FS_GENERIC | |
162 | #endif | |
163 | ||
164 | /* | |
165 | * Our platforms make use of SPL to initalize the hardware (primarily | |
166 | * memory) enough for full U-Boot to be loaded. We also support Falcon | |
167 | * Mode so that the Linux kernel can be booted directly from SPL | |
168 | * instead, if desired. We make use of the general SPL framework found | |
169 | * under common/spl/. Given our generally common memory map, we set a | |
170 | * number of related defaults and sizes here. | |
171 | */ | |
172 | #ifndef CONFIG_NOR_BOOT | |
173 | #define CONFIG_SPL | |
174 | #define CONFIG_SPL_FRAMEWORK | |
175 | #define CONFIG_SPL_OS_BOOT | |
176 | ||
177 | /* | |
178 | * Place the image at the start of the ROM defined image space. | |
179 | * We limit our size to the ROM-defined downloaded image area, and use the | |
180 | * rest of the space for stack. We load U-Boot itself into memory at | |
181 | * 0x80800000 for legacy reasons (to not conflict with older SPLs). We | |
182 | * have our BSS be placed 1MiB after this, to allow for the default | |
183 | * Linux kernel address of 0x80008000 to work, in the Falcon Mode case. | |
184 | * We have the SPL malloc pool at the end of the BSS area. | |
185 | */ | |
186 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
187 | #define CONFIG_SYS_TEXT_BASE 0x80800000 | |
188 | #define CONFIG_SPL_BSS_START_ADDR 0x80a00000 | |
189 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
190 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ | |
191 | CONFIG_SPL_BSS_MAX_SIZE) | |
192 | #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN | |
193 | ||
194 | /* RAW SD card / eMMC locations. */ | |
195 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
196 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
197 | ||
198 | /* FAT sd card locations. */ | |
199 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
200 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
201 | ||
202 | #ifdef CONFIG_SPL_OS_BOOT | |
203 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100) | |
204 | ||
205 | /* FAT */ | |
206 | #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" | |
207 | #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args" | |
208 | ||
209 | /* RAW SD card / eMMC */ | |
210 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ | |
211 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ | |
212 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ | |
213 | ||
214 | /* NAND */ | |
215 | #ifdef CONFIG_NAND | |
216 | #define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */ | |
217 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
218 | #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 | |
219 | #endif | |
220 | ||
221 | /* spl export command */ | |
222 | #define CONFIG_CMD_SPL | |
223 | #endif | |
224 | ||
225 | #ifdef CONFIG_MMC | |
226 | #define CONFIG_SPL_MMC_SUPPORT | |
227 | #define CONFIG_SPL_FAT_SUPPORT | |
228 | #endif | |
229 | ||
230 | /* General parts of the framework. */ | |
231 | #define CONFIG_SPL_I2C_SUPPORT | |
232 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
233 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
234 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
235 | #define CONFIG_SPL_SERIAL_SUPPORT | |
236 | #define CONFIG_SPL_GPIO_SUPPORT | |
237 | #define CONFIG_SPL_BOARD_INIT | |
238 | ||
239 | #ifdef CONFIG_NAND | |
240 | #define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */ | |
241 | #define CONFIG_SPL_NAND_SUPPORT | |
242 | #define CONFIG_SPL_NAND_BASE | |
243 | #define CONFIG_SPL_NAND_DRIVERS | |
244 | #define CONFIG_SPL_NAND_ECC | |
245 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
246 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
247 | #endif | |
248 | #endif /* !CONFIG_NOR_BOOT */ | |
249 | ||
250 | #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ |