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ARM: OMAP5: Rename to ti_omap5_common.h
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1/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * TI OMAP5 AND DRA7XX common configuration settings
10 *
3765b3e7 11 * SPDX-License-Identifier: GPL-2.0+
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12 *
13 * For more details, please see the technical documents listed at
14 * http://www.ti.com/product/omap5432
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15 */
16
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17#ifndef __CONFIG_TI_OMAP5_COMMON_H
18#define __CONFIG_TI_OMAP5_COMMON_H
3ef5ebeb 19
a8017574 20#define CONFIG_OMAP54XX
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21#define CONFIG_DISPLAY_CPUINFO
22#define CONFIG_DISPLAY_BOARDINFO
3ef5ebeb 23#define CONFIG_MISC_INIT_R
a8017574 24#define CONFIG_ARCH_CPU_INIT
3ef5ebeb 25
a8017574 26#define CONFIG_SYS_CACHELINE_SIZE 64
3ef5ebeb 27
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28/* Use General purpose timer 1 */
29#define CONFIG_SYS_TIMERBASE GPT2_BASE
30
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31/*
32 * For the DDR timing information we can either dynamically determine
33 * the timings to use or use pre-determined timings (based on using the
34 * dynamic method. Default to the static timing infomation.
35 */
a8017574 36#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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37#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
38#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
39#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
40#endif
41
42#ifndef CONFIG_SPL_BUILD
43#define CONFIG_PALMAS_POWER
44#endif
45
46#include <asm/arch/cpu.h>
47#include <asm/arch/omap.h>
3ef5ebeb 48
3ef5ebeb 49#define CONFIG_ENV_SIZE (128 << 10)
3ef5ebeb 50
a8017574 51#include <configs/ti_armv7_common.h>
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52
53/*
a8017574 54 * Hardware drivers
3ef5ebeb 55 */
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56#define CONFIG_SYS_NS16550
57#define CONFIG_SYS_NS16550_SERIAL
58#define CONFIG_SYS_NS16550_REG_SIZE (-4)
a8017574 59#define CONFIG_SYS_NS16550_CLK 48000000
3ef5ebeb 60
a8017574 61/* Per-SoC commands */
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62#undef CONFIG_CMD_NET
63#undef CONFIG_CMD_NFS
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64
65/*
66 * Environment setup
67 */
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68#ifndef PARTS_DEFAULT
69#define PARTS_DEFAULT
70#endif
71
3ef5ebeb 72#define CONFIG_EXTRA_ENV_SETTINGS \
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73 "loadaddr=0x80200000\0" \
74 "fdtaddr=0x80F80000\0" \
d3501ed5 75 "fdt_high=0xffffffff\0" \
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76 "rdaddr=0x81000000\0" \
77 "console=" CONSOLEDEV ",115200n8\0" \
a7143215 78 "fdtfile=undefined\0" \
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79 "bootpart=0:2\0" \
80 "bootdir=/boot\0" \
aaed0a23 81 "bootfile=zImage\0" \
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82 "usbtty=cdc_acm\0" \
83 "vram=16M\0" \
9552ee3e 84 "partitions=" PARTS_DEFAULT "\0" \
85b7ac45 85 "optargs=\0" \
3ef5ebeb 86 "mmcdev=0\0" \
7406d321 87 "mmcroot=/dev/mmcblk1p2 rw\0" \
46afd3ef 88 "mmcrootfstype=ext4 rootwait\0" \
3ef5ebeb 89 "mmcargs=setenv bootargs console=${console} " \
85b7ac45 90 "${optargs} " \
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91 "vram=${vram} " \
92 "root=${mmcroot} " \
93 "rootfstype=${mmcrootfstype}\0" \
94 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
95 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
96 "source ${loadaddr}\0" \
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97 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
98 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
99 "env import -t ${loadaddr} ${filesize}\0" \
143070df 100 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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101 "mmcboot=mmc dev ${mmcdev}; " \
102 "if mmc rescan; then " \
103 "echo SD/MMC found on device ${mmcdev};" \
104 "if run loadbootenv; then " \
105 "echo Loaded environment from ${bootenv};" \
106 "run importbootenv;" \
107 "fi;" \
108 "if test -n $uenvcmd; then " \
109 "echo Running uenvcmd ...;" \
110 "run uenvcmd;" \
111 "fi;" \
112 "if run loadimage; then " \
113 "run loadfdt; " \
114 "echo Booting from mmc${mmcdev} ...; " \
115 "run mmcargs; " \
116 "bootz ${loadaddr} - ${fdtaddr}; " \
117 "fi;" \
118 "fi;\0" \
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119 "findfdt="\
120 "if test $board_name = omap5_uevm; then " \
a7143215 121 "setenv fdtfile omap5-uevm.dtb; fi; " \
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122 "if test $board_name = dra7xx; then " \
123 "setenv fdtfile dra7-evm.dtb; fi;" \
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124 "if test $fdtfile = undefined; then " \
125 "echo WARNING: Could not determine device tree to use; fi; \0" \
143070df 126 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
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127
128#define CONFIG_BOOTCOMMAND \
143070df 129 "run findfdt; " \
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130 "run mmcboot;" \
131 "setenv mmcdev 1; " \
132 "setenv bootpart 1:2; " \
133 "setenv mmcroot /dev/mmcblk0p2 rw; " \
134 "run mmcboot;" \
3ef5ebeb 135
a5d439c2 136
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137/*
138 * SPL related defines. The Public RAM memory map the ROM defines the
139 * area between 0x40300000 and 0x4031E000 as a download area for OMAP5
140 * (dra7xx is larger, but we do not need to be larger at this time). We
141 * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
142 * print some information.
143 */
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144#define CONFIG_SPL_TEXT_BASE 0x40300000
145#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
3ef5ebeb 146#define CONFIG_SPL_DISPLAY_PRINT
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147#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
148
3d657a05 149#endif /* __CONFIG_TI_OMAP5_COMMON_H */