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3ef5ebeb LV |
1 | /* |
2 | * (C) Copyright 2013 | |
3 | * Texas Instruments Incorporated. | |
4 | * Sricharan R <r.sricharan@ti.com> | |
5 | * | |
6 | * Derived from OMAP4 done by: | |
7 | * Aneesh V <aneesh@ti.com> | |
8 | * | |
9 | * TI OMAP5 AND DRA7XX common configuration settings | |
10 | * | |
3765b3e7 | 11 | * SPDX-License-Identifier: GPL-2.0+ |
a8017574 TR |
12 | * |
13 | * For more details, please see the technical documents listed at | |
14 | * http://www.ti.com/product/omap5432 | |
3ef5ebeb LV |
15 | */ |
16 | ||
3d657a05 EBS |
17 | #ifndef __CONFIG_TI_OMAP5_COMMON_H |
18 | #define __CONFIG_TI_OMAP5_COMMON_H | |
3ef5ebeb | 19 | |
3ef5ebeb LV |
20 | #define CONFIG_DISPLAY_CPUINFO |
21 | #define CONFIG_DISPLAY_BOARDINFO | |
a8017574 | 22 | #define CONFIG_ARCH_CPU_INIT |
3ef5ebeb | 23 | |
5f603761 PR |
24 | /* Common ARM Erratas */ |
25 | #define CONFIG_ARM_ERRATA_798870 | |
26 | ||
a8017574 | 27 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
3ef5ebeb | 28 | |
a8017574 TR |
29 | /* Use General purpose timer 1 */ |
30 | #define CONFIG_SYS_TIMERBASE GPT2_BASE | |
31 | ||
078aa4f1 TR |
32 | /* |
33 | * For the DDR timing information we can either dynamically determine | |
34 | * the timings to use or use pre-determined timings (based on using the | |
35 | * dynamic method. Default to the static timing infomation. | |
36 | */ | |
a8017574 | 37 | #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
a8017574 TR |
38 | #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
39 | #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION | |
40 | #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS | |
41 | #endif | |
42 | ||
a8017574 | 43 | #define CONFIG_PALMAS_POWER |
a8017574 TR |
44 | |
45 | #include <asm/arch/cpu.h> | |
46 | #include <asm/arch/omap.h> | |
3ef5ebeb | 47 | |
9a0f4004 | 48 | #include <configs/ti_armv7_omap.h> |
3ef5ebeb LV |
49 | |
50 | /* | |
a8017574 | 51 | * Hardware drivers |
3ef5ebeb | 52 | */ |
c7b9686d | 53 | #define CONFIG_SYS_NS16550_CLK 48000000 |
01e870b7 | 54 | #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) |
3ef5ebeb LV |
55 | #define CONFIG_SYS_NS16550_SERIAL |
56 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
01e870b7 | 57 | #endif |
3ef5ebeb | 58 | |
3ef5ebeb LV |
59 | /* |
60 | * Environment setup | |
61 | */ | |
9552ee3e TR |
62 | #ifndef PARTS_DEFAULT |
63 | #define PARTS_DEFAULT | |
64 | #endif | |
65 | ||
7a5a3e37 KVA |
66 | #ifndef DFUARGS |
67 | #define DFUARGS | |
68 | #endif | |
69 | ||
08520bf5 | 70 | #ifndef CONFIG_SPL_BUILD |
4ec3f6e5 | 71 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
3ef5ebeb | 72 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
fb3ad9bd | 73 | DEFAULT_LINUX_BOOT_ENV \ |
85d17be3 | 74 | DEFAULT_MMC_TI_ARGS \ |
f6723794 | 75 | "console=" CONSOLEDEV ",115200n8\0" \ |
a7143215 | 76 | "fdtfile=undefined\0" \ |
143070df S |
77 | "bootpart=0:2\0" \ |
78 | "bootdir=/boot\0" \ | |
aaed0a23 | 79 | "bootfile=zImage\0" \ |
3ef5ebeb LV |
80 | "usbtty=cdc_acm\0" \ |
81 | "vram=16M\0" \ | |
9552ee3e | 82 | "partitions=" PARTS_DEFAULT "\0" \ |
85b7ac45 | 83 | "optargs=\0" \ |
16862604 | 84 | "dofastboot=0\0" \ |
3ef5ebeb LV |
85 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
86 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ | |
87 | "source ${loadaddr}\0" \ | |
fa58b102 CJF |
88 | "bootenv=uEnv.txt\0" \ |
89 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ | |
78fd0041 NM |
90 | "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ |
91 | "env import -t ${loadaddr} ${filesize}\0" \ | |
143070df | 92 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
7406d321 TR |
93 | "mmcboot=mmc dev ${mmcdev}; " \ |
94 | "if mmc rescan; then " \ | |
95 | "echo SD/MMC found on device ${mmcdev};" \ | |
96 | "if run loadbootenv; then " \ | |
97 | "echo Loaded environment from ${bootenv};" \ | |
98 | "run importbootenv;" \ | |
99 | "fi;" \ | |
100 | "if test -n $uenvcmd; then " \ | |
101 | "echo Running uenvcmd ...;" \ | |
102 | "run uenvcmd;" \ | |
103 | "fi;" \ | |
104 | "if run loadimage; then " \ | |
105 | "run loadfdt; " \ | |
106 | "echo Booting from mmc${mmcdev} ...; " \ | |
85d17be3 | 107 | "run args_mmc; " \ |
7406d321 TR |
108 | "bootz ${loadaddr} - ${fdtaddr}; " \ |
109 | "fi;" \ | |
110 | "fi;\0" \ | |
143070df S |
111 | "findfdt="\ |
112 | "if test $board_name = omap5_uevm; then " \ | |
a7143215 | 113 | "setenv fdtfile omap5-uevm.dtb; fi; " \ |
45dbbf29 DM |
114 | "if test $board_name = dra7xx; then " \ |
115 | "setenv fdtfile dra7-evm.dtb; fi;" \ | |
4ec3f6e5 LV |
116 | "if test $board_name = dra72x; then " \ |
117 | "setenv fdtfile dra72-evm.dtb; fi;" \ | |
1e4ad74b FB |
118 | "if test $board_name = beagle_x15; then " \ |
119 | "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ | |
a7143215 DM |
120 | "if test $fdtfile = undefined; then " \ |
121 | "echo WARNING: Could not determine device tree to use; fi; \0" \ | |
143070df | 122 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ |
7a5a3e37 | 123 | DFUARGS \ |
2320866b | 124 | NETARGS \ |
3ef5ebeb | 125 | |
ecd85579 | 126 | |
3ef5ebeb | 127 | #define CONFIG_BOOTCOMMAND \ |
ecd85579 DK |
128 | "if test ${dofastboot} -eq 1; then " \ |
129 | "echo Boot fastboot requested, resetting dofastboot ...;" \ | |
130 | "setenv dofastboot 0; saveenv;" \ | |
8d2f0039 | 131 | "echo Booting into fastboot ...; fastboot 0;" \ |
ecd85579 | 132 | "fi;" \ |
143070df | 133 | "run findfdt; " \ |
7406d321 TR |
134 | "run mmcboot;" \ |
135 | "setenv mmcdev 1; " \ | |
136 | "setenv bootpart 1:2; " \ | |
137 | "setenv mmcroot /dev/mmcblk0p2 rw; " \ | |
138 | "run mmcboot;" \ | |
ecd85579 | 139 | "" |
08520bf5 | 140 | #endif |
3ef5ebeb | 141 | |
a5d439c2 | 142 | |
078aa4f1 TR |
143 | /* |
144 | * SPL related defines. The Public RAM memory map the ROM defines the | |
145 | * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 | |
146 | * (dra7xx is larger, but we do not need to be larger at this time). We | |
147 | * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and | |
148 | * print some information. | |
149 | */ | |
c3799fce TR |
150 | #define CONFIG_SPL_TEXT_BASE 0x40300000 |
151 | #define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) | |
3ef5ebeb | 152 | #define CONFIG_SPL_DISPLAY_PRINT |
3ef5ebeb | 153 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
d3289aac TR |
154 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
155 | (128 << 20)) | |
3ef5ebeb | 156 | |
70e71b61 EBS |
157 | #ifdef CONFIG_NAND |
158 | #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ | |
159 | #endif | |
160 | ||
136b1013 M |
161 | /* |
162 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
163 | * DM support in SPL | |
164 | */ | |
165 | #ifdef CONFIG_SPL_BUILD | |
166 | #undef CONFIG_DM_MMC | |
167 | #endif | |
168 | ||
3d657a05 | 169 | #endif /* __CONFIG_TI_OMAP5_COMMON_H */ |