[people/ms/u-boot.git] / include / configs / titanium.h

/*
 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
 *
 * Configuration settings for the ProjectionDesign / Barco
 * Titanium board.
 *
 * Based on mx6qsabrelite.h which is:
 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

#define CONFIG_MX6Q

#define MACH_TYPE_TITANIUM		3769
#define CONFIG_MACH_TYPE		MACH_TYPE_TITANIUM

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_USDHC_NUM	1

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_FEC_MXC_PHYADDR		4
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* Miscellaneous commands */
#define CONFIG_CMD_BMODE

#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (500 << 20))

#define CONFIG_HOSTNAME			titanium
#define CONFIG_UBI_PART			ubi
#define CONFIG_UBIFS_VOLUME		rootfs0

#define MTDIDS_DEFAULT		"nand0=gpmi-nand"
#define MTDPARTS_DEFAULT	"mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
				"512k(env2),-(ubi)"

#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"kernel_fs=/boot/uImage\0"					\
	"kernel_addr=11000000\0"					\
	"dtb=" __stringify(CONFIG_HOSTNAME) "/"				\
		__stringify(CONFIG_HOSTNAME) ".dtb\0"			\
	"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"		\
	"dtb_addr=12800000\0"						\
	"script=boot.scr\0" \
	"uimage=uImage\0" \
	"console=ttymxc0\0" \
	"baudrate=115200\0" \
	"fdt_high=0xffffffff\0"	  \
	"initrd_high=0xffffffff\0" \
	"mmcdev=0\0" \
	"mmcpart=1\0" \
	"uimage=uImage\0" \
	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
		" ${script}\0" \
	"bootscript=echo Running bootscript from mmc ...; source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"mmcroot=/dev/mmcblk0p2\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot} rootwait rw\0" \
	"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
		" ${uimage}; bootm\0" \
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addcon=setenv bootargs ${bootargs} console=ttymxc0,"		\
		"${baudrate}\0"						\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0"	\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"		\
	"part=" __stringify(CONFIG_UBI_PART) "\0"			\
	"boot_vol=0\0"							\
	"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"			\
	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0"			\
	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}"	\
		" ${filesize}\0"					\
	"upd_ubifs=run load_ubifs update_ubifs\0"			\
	"init_ubi=nand erase.part ubi;ubi part ${part};"		\
		"ubi create ${vol} c800000\0"				\
	"mtdids=" MTDIDS_DEFAULT "\0"					\
	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"		\
		" addcon addmtd;"					\
		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
	"ubifsargs=set bootargs ubi.mtd=ubi "				\
		"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0"		\
	"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0"	\
	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"		\
		"ubifsload ${dtb_addr} ${dtb_fs};\0"			\
	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon "	\
		"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0"		\
	"load_kernel=tftp ${kernel_addr} ${kernel}\0"			\
	"load_dtb=tftp ${dtb_addr} ${dtb}\0"				\
	"net_nfs=run load_dtb load_kernel; "				\
		"run nfsargs addip addcon addmtd;"			\
		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
	"delenv=env default -a -f; saveenv; reset\0"

#define CONFIG_BOOTCOMMAND		"run nand_ubifs"

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					 sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			(512 << 20)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS

#ifdef CONFIG_CMD_NAND

/* NAND stuff */
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION

/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8

/* Environment in NAND */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		(16 << 20)
#define CONFIG_ENV_SECT_SIZE		(128 << 10)
#define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + (512 << 10))
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE

#else /* CONFIG_CMD_NAND */

/* Environment in MMC */
#define CONFIG_ENV_SIZE			(8 << 10)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0

#endif /* CONFIG_CMD_NAND */

/* UBI/UBIFS config options */
#define CONFIG_LZO
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBIFS

#endif			       /* __CONFIG_H */
Commit	Line	Data
b29ca4a1 SR	1	/*
	2	* Copyright (C) 2013 Stefan Roese <sr@denx.de>
	3	*
	4	* Configuration settings for the ProjectionDesign / Barco
	5	* Titanium board.
	6	*
	7	* Based on mx6qsabrelite.h which is:
	8	* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
b29ca4a1 SR	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
02824dc7	16	#include "mx6_common.h"
b29ca4a1	17
b29ca4a1	18	#define CONFIG_MX6Q
b29ca4a1 SR	19
	20	#define MACH_TYPE_TITANIUM 3769
	21	#define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM
	22
b29ca4a1 SR	23	/* Size of malloc() pool */
	24	#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
	25
	26	#define CONFIG_BOARD_EARLY_INIT_F
	27	#define CONFIG_MISC_INIT_R
b29ca4a1 SR	28
	29	#define CONFIG_MXC_UART
	30	#define CONFIG_MXC_UART_BASE UART1_BASE
	31
	32	/* I2C Configs */
b089d039	33	#define CONFIG_SYS_I2C
b089d039	34	#define CONFIG_SYS_I2C_MXC
03544c66 AA	35	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	36	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	37	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
b29ca4a1 SR	38	#define CONFIG_SYS_I2C_SPEED 100000
	39
	40	/* MMC Configs */
b29ca4a1 SR	41	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	42	#define CONFIG_SYS_FSL_USDHC_NUM 1
	43
b29ca4a1 SR	44	#define CONFIG_FEC_MXC
	45	#define CONFIG_MII
	46	#define IMX_FEC_BASE ENET_BASE_ADDR
	47	#define CONFIG_FEC_XCV_TYPE RGMII
	48	#define CONFIG_FEC_MXC_PHYADDR 4
	49	#define CONFIG_PHYLIB
	50	#define CONFIG_PHY_MICREL
	51	#define CONFIG_PHY_MICREL_KSZ9021
	52
	53	/* USB Configs */
b29ca4a1 SR	54	#define CONFIG_USB_EHCI
b29ca4a1 SR	55	#define CONFIG_USB_EHCI_MX6
b29ca4a1 SR	56	#define CONFIG_MXC_USB_PORT 1
	57	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	58	#define CONFIG_MXC_USB_FLAGS 0
	59
	60	/* Miscellaneous commands */
	61	#define CONFIG_CMD_BMODE
	62
b29ca4a1 SR	63	#define CONFIG_SYS_MEMTEST_START 0x10000000
	64	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
	65
	66	#define CONFIG_HOSTNAME titanium
	67	#define CONFIG_UBI_PART ubi
	68	#define CONFIG_UBIFS_VOLUME rootfs0
	69
	70	#define MTDIDS_DEFAULT "nand0=gpmi-nand"
	71	#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
	72	"512k(env2),-(ubi)"
	73
	74	#define CONFIG_EXTRA_ENV_SETTINGS \
	75	"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	76	"kernel_fs=/boot/uImage\0" \
	77	"kernel_addr=11000000\0" \
	78	"dtb=" __stringify(CONFIG_HOSTNAME) "/" \
	79	__stringify(CONFIG_HOSTNAME) ".dtb\0" \
	80	"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \
	81	"dtb_addr=12800000\0" \
	82	"script=boot.scr\0" \
	83	"uimage=uImage\0" \
	84	"console=ttymxc0\0" \
	85	"baudrate=115200\0" \
	86	"fdt_high=0xffffffff\0" \
	87	"initrd_high=0xffffffff\0" \
	88	"mmcdev=0\0" \
	89	"mmcpart=1\0" \
	90	"uimage=uImage\0" \
	91	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
	92	" ${script}\0" \
	93	"bootscript=echo Running bootscript from mmc ...; source\0" \
	94	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	95	"mmcroot=/dev/mmcblk0p2\0" \
	96	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	97	"root=${mmcroot} rootwait rw\0" \
	98	"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
	99	" ${uimage}; bootm\0" \
	100	"addip=setenv bootargs ${bootargs} " \
	101	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	102	":${hostname}:${netdev}:off panic=1\0" \
	103	"addcon=setenv bootargs ${bootargs} console=ttymxc0," \
	104	"${baudrate}\0" \
	105	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	106	"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
	107	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	108	"nfsroot=${serverip}:${rootpath}\0" \
	109	"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \
	110	"part=" __stringify(CONFIG_UBI_PART) "\0" \
	111	"boot_vol=0\0" \
	112	"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
	113	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \
	114	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
	115	" ${filesize}\0" \
	116	"upd_ubifs=run load_ubifs update_ubifs\0" \
	117	"init_ubi=nand erase.part ubi;ubi part ${part};" \
	118	"ubi create ${vol} c800000\0" \
	119	"mtdids=" MTDIDS_DEFAULT "\0" \
	120	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	121	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \
	122	" addcon addmtd;" \
	123	"bootm ${kernel_addr} - ${dtb_addr}\0" \
	124	"ubifsargs=set bootargs ubi.mtd=ubi " \
	125	"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \
	126	"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \
127	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \
128	"ubifsload ${dtb_addr} ${dtb_fs};\0" \
129	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
130	"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \
131	"load_kernel=tftp ${kernel_addr} ${kernel}\0" \
132	"load_dtb=tftp ${dtb_addr} ${dtb}\0" \
133	"net_nfs=run load_dtb load_kernel; " \
134	"run nfsargs addip addcon addmtd;" \
135	"bootm ${kernel_addr} - ${dtb_addr}\0" \
136	"delenv=env default -a -f; saveenv; reset\0"
137
138	#define CONFIG_BOOTCOMMAND "run nand_ubifs"
139
b29ca4a1 SR	140	/* Print Buffer Size */
	141	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	142	sizeof(CONFIG_SYS_PROMPT) + 16)
b29ca4a1	143
b29ca4a1 SR	144	/* Physical Memory Map */
	145	#define CONFIG_NR_DRAM_BANKS 1
	146	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	147	#define PHYS_SDRAM_SIZE (512 << 20)
	148
	149	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	150	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	151	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	152
	153	#define CONFIG_SYS_INIT_SP_OFFSET \
	154	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	155	#define CONFIG_SYS_INIT_SP_ADDR \
	156	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	157
b29ca4a1 SR	158	/* Enable NAND support */
	159	#define CONFIG_CMD_NAND
	160	#define CONFIG_CMD_NAND_TRIMFFS
b29ca4a1 SR	161
	162	#ifdef CONFIG_CMD_NAND
	163
	164	/* NAND stuff */
	165	#define CONFIG_NAND_MXS
	166	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	167	#define CONFIG_SYS_NAND_BASE 0x40000000
	168	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	169	#define CONFIG_SYS_NAND_ONFI_DETECTION
	170
	171	/* DMA stuff, needed for GPMI/MXS NAND support */
	172	#define CONFIG_APBH_DMA
	173	#define CONFIG_APBH_DMA_BURST
	174	#define CONFIG_APBH_DMA_BURST8
	175
	176	/* Environment in NAND */
	177	#define CONFIG_ENV_IS_IN_NAND
	178	#define CONFIG_ENV_OFFSET (16 << 20)
	179	#define CONFIG_ENV_SECT_SIZE (128 << 10)
	180	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	181	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
	182	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	183
	184	#else /* CONFIG_CMD_NAND */
	185
	186	/* Environment in MMC */
	187	#define CONFIG_ENV_SIZE (8 << 10)
	188	#define CONFIG_ENV_IS_IN_MMC
	189	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	190	#define CONFIG_SYS_MMC_ENV_DEV 0
	191
	192	#endif /* CONFIG_CMD_NAND */
	193
	194	/* UBI/UBIFS config options */
	195	#define CONFIG_LZO
	196	#define CONFIG_MTD_DEVICE
	197	#define CONFIG_MTD_PARTITIONS
	198	#define CONFIG_RBTREE
	199	#define CONFIG_CMD_MTDPARTS
b29ca4a1 SR	200	#define CONFIG_CMD_UBIFS
b29ca4a1 SR	201
b29ca4a1	202	#endif /* __CONFIG_H */