[people/ms/u-boot.git] / include / configs / tny_a9260.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Copyright (C) 2009
 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
 *
 * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>

#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
#define CONFIG_ENV_IS_IN_NAND
#else
#define CONFIG_ENV_IS_IN_EEPROM
#endif

/* Define actual evaluation board type from used processor type */
#ifdef CONFIG_AT91SAM9G20
# define CONFIG_TNY_A9G20
# define MACH_TYPE_TNY_A9G20		2059
# define CONFIG_MACH_TYPE		MACH_TYPE_TNY_A9G20
#else
# define CONFIG_TNY_A9260
# define MACH_TYPE_TNY_A9260		2058
# define CONFIG_MACH_TYPE		MACH_TYPE_TNY_A9260
#endif

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
#define CONFIG_SYS_HZ		        1000

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG	        /* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT

/*
 * Hardware drivers
 */
#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO

#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

#define CONFIG_BOOTDELAY	3

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_USB

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		0x04000000	/* 64 megs */
# define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* SPI EEPROM */
#define CONFIG_SPI
#define CONFIG_CMD_SPI
#define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)

#define CONFIG_CMD_EEPROM
#define CONFIG_SPI_M95XXX
#define CONFIG_SYS_EEPROM_SIZE 0x10000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5

/* NAND flash */
#define CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13

/* NOR flash - no real flash on this board */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END			0x23e00000

/* Env in EEPROM, bootstrap + u-boot in NAND*/
#ifdef CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_ENV_OFFSET		0x20
#define CONFIG_ENV_SIZE		        0x1000
#endif

/* Env, bootstrap and u-boot in NAND */
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET               0x60000
#define CONFIG_ENV_OFFSET_REDUND        0x80000
#define CONFIG_ENV_SIZE                 0x20000
#endif

#define CONFIG_BOOTCOMMAND	"nboot 0x21000000 0 400000"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock1 " \
				"mtdparts=atmel_nand:16M(kernel)ro," \
				"120M(rootfs),-(other) " \
				"rw rootfstype=jffs2"

#define CONFIG_SYS_PROMPT	"U-Boot> "
#define CONFIG_SYS_CBSIZE	256
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)

#endif
Commit	Line	Data
2dc851e3 AT	1	/*
2dc851e3 AT	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
2dc851e3 AT	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Copyright (C) 2009
	7	* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
	8	*
	9	* Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
	10	*
1a459660	11	* SPDX-License-Identifier: GPL-2.0+
2dc851e3 AT	12	*/
	13
	14	#ifndef __CONFIG_H
	15	#define __CONFIG_H
	16
65b0f87a TP	17	/*
	18	* SoC must be defined first, before hardware.h is included.
	19	* In this case SoC is defined in boards.cfg.
	20	*/
	21	#include <asm/hardware.h>
2dc851e3 AT	22
	23	#if defined(CONFIG_TNY_A9260_NANDFLASH) \|\| defined(CONFIG_TNY_A9G20_NANDFLASH)
	24	#define CONFIG_ENV_IS_IN_NAND
	25	#else
	26	#define CONFIG_ENV_IS_IN_EEPROM
	27	#endif
	28
65b0f87a TP	29	/* Define actual evaluation board type from used processor type */
	30	#ifdef CONFIG_AT91SAM9G20
	31	# define CONFIG_TNY_A9G20
159dad65 AG	32	# define MACH_TYPE_TNY_A9G20 2059
159dad65 AG	33	# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20
65b0f87a TP	34	#else
65b0f87a TP	35	# define CONFIG_TNY_A9260
159dad65 AG	36	# define MACH_TYPE_TNY_A9260 2058
159dad65 AG	37	# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260
65b0f87a TP	38	#endif
65b0f87a TP	39
2dc851e3	40	/* ARM asynchronous clock */
65b0f87a	41	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
7c966a8b	42	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
65b0f87a	43	#define CONFIG_SYS_HZ 1000
2dc851e3	44
2dc851e3	45	#define CONFIG_ARCH_CPU_INIT
65b0f87a TP	46	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	47	#define CONFIG_SETUP_MEMORY_TAGS
	48	#define CONFIG_INITRD_TAG
2dc851e3	49	#define CONFIG_SKIP_LOWLEVEL_INIT
2dc851e3 AT	50
	51	/*
	52	* Hardware drivers
	53	*/
65b0f87a TP	54	#define CONFIG_ATMEL_LEGACY
	55	#define CONFIG_AT91_GPIO
	56
	57	#define CONFIG_ATMEL_USART
	58	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	59	#define CONFIG_USART_ID ATMEL_ID_SYS
	60	#define CONFIG_BAUDRATE 115200
2dc851e3 AT	61
	62	#define CONFIG_BOOTDELAY 3
	63
	64	/*
	65	* Command line configuration.
	66	*/
	67	#include <config_cmd_default.h>
	68	#undef CONFIG_CMD_BDI
	69	#undef CONFIG_CMD_FPGA
	70	#undef CONFIG_CMD_IMI
	71	#undef CONFIG_CMD_IMLS
	72	#undef CONFIG_CMD_LOADS
	73	#undef CONFIG_CMD_NET
65b0f87a	74	#undef CONFIG_CMD_NFS
2dc851e3 AT	75	#undef CONFIG_CMD_SOURCE
	76	#undef CONFIG_CMD_USB
	77
	78	/* SDRAM */
	79	#define CONFIG_NR_DRAM_BANKS 1
65b0f87a TP	80	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
	81	#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
	82	# define CONFIG_SYS_INIT_SP_ADDR \
	83	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
2dc851e3 AT	84
	85	/* SPI EEPROM */
	86	#define CONFIG_SPI
	87	#define CONFIG_CMD_SPI
	88	#define CONFIG_ATMEL_SPI
	89	#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	90
	91	#define CONFIG_CMD_EEPROM
	92	#define CONFIG_SPI_M95XXX
	93	#define CONFIG_SYS_EEPROM_SIZE 0x10000
	94	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
	95
	96	/* NAND flash */
	97	#define CONFIG_CMD_NAND
	98	#define CONFIG_NAND_ATMEL
	99	#define CONFIG_SYS_MAX_NAND_DEVICE 1
65b0f87a TP	100	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
65b0f87a TP	101	#define CONFIG_SYS_NAND_DBW_8
2dc851e3 AT	102	/* our ALE is AD21 */
	103	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	104	/* our CLE is AD22 */
	105	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	106	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	107	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
	108
	109	/* NOR flash - no real flash on this board */
65b0f87a	110	#define CONFIG_SYS_NO_FLASH
2dc851e3	111
65b0f87a TP	112	#define CONFIG_DOS_PARTITION
65b0f87a TP	113	#define CONFIG_CMD_FAT
2dc851e3 AT	114
	115	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	116
65b0f87a	117	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
2dc851e3 AT	118	#define CONFIG_SYS_MEMTEST_END 0x23e00000
	119
	120	/* Env in EEPROM, bootstrap + u-boot in NAND*/
	121	#ifdef CONFIG_ENV_IS_IN_EEPROM
	122	#define CONFIG_ENV_OFFSET 0x20
65b0f87a	123	#define CONFIG_ENV_SIZE 0x1000
2dc851e3 AT	124	#endif
	125
	126	/* Env, bootstrap and u-boot in NAND */
	127	#ifdef CONFIG_ENV_IS_IN_NAND
65b0f87a TP	128	#define CONFIG_ENV_OFFSET 0x60000
	129	#define CONFIG_ENV_OFFSET_REDUND 0x80000
	130	#define CONFIG_ENV_SIZE 0x20000
2dc851e3 AT	131	#endif
	132
	133	#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
	134	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	135	"root=/dev/mtdblock1 " \
	136	"mtdparts=atmel_nand:16M(kernel)ro," \
	137	"120M(rootfs),-(other) " \
	138	"rw rootfstype=jffs2"
	139
2dc851e3 AT	140	#define CONFIG_SYS_PROMPT "U-Boot> "
	141	#define CONFIG_SYS_CBSIZE 256
	142	#define CONFIG_SYS_MAXARGS 16
	143	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
65b0f87a TP	144	#define CONFIG_SYS_LONGHELP
65b0f87a TP	145	#define CONFIG_CMDLINE_EDITING
2dc851e3 AT	146
	147	/*
	148	* Size of malloc() pool
	149	*/
	150	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
2dc851e3	151
2dc851e3	152	#endif