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1dcdd862 MK |
1 | /* |
2 | * (C) Copyright 2007-2013 | |
3 | * Stelian Pop <stelian.pop@leadtechdesign.com> | |
4 | * Lead Tech Design <www.leadtechdesign.com> | |
5 | * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com> | |
6 | * Mateusz Kulikowski <mateusz.kulikowski@gmail.com> | |
7 | * | |
8 | * Settings for Calao USB-A9263 board | |
9 | * | |
10 | * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap | |
11 | * installed on board will not be able to load it properly. | |
12 | * | |
13 | * SPDX-License-Identifier: GPL-2.0+ | |
14 | */ | |
15 | ||
16 | #ifndef __CONFIG_H | |
17 | #define __CONFIG_H | |
18 | #include <asm/hardware.h> | |
19 | ||
20 | /* ARM asynchronous clock */ | |
21 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ | |
22 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
1dcdd862 MK |
23 | |
24 | #define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263 | |
25 | ||
26 | #define CONFIG_ARCH_CPU_INIT | |
27 | ||
28 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
29 | #define CONFIG_SETUP_MEMORY_TAGS | |
30 | #define CONFIG_INITRD_TAG | |
31 | ||
32 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
33 | ||
1dcdd862 MK |
34 | /* |
35 | * Hardware drivers | |
36 | */ | |
1dcdd862 MK |
37 | /* |
38 | * BOOTP options | |
39 | */ | |
40 | #define CONFIG_BOOTP_BOOTFILESIZE | |
41 | #define CONFIG_BOOTP_BOOTPATH | |
42 | #define CONFIG_BOOTP_GATEWAY | |
43 | #define CONFIG_BOOTP_HOSTNAME | |
44 | ||
1dcdd862 MK |
45 | /* SDRAM */ |
46 | #define CONFIG_NR_DRAM_BANKS 1 | |
47 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
48 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
49 | ||
50 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
fdc77189 | 51 | (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
1dcdd862 | 52 | |
1dcdd862 MK |
53 | /* NAND flash */ |
54 | #ifdef CONFIG_CMD_NAND | |
55 | #define CONFIG_NAND_ATMEL | |
56 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
57 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
58 | /* our ALE is AD21 */ | |
59 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
60 | /* our CLE is AD22 */ | |
61 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
62 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) | |
63 | #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) | |
64 | #endif | |
65 | ||
1dcdd862 MK |
66 | /* Ethernet */ |
67 | #define CONFIG_MACB | |
68 | #define CONFIG_RMII | |
69 | #define CONFIG_NET_RETRY_COUNT 20 | |
70 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
71 | ||
72 | /* USB */ | |
73 | #ifdef CONFIG_CMD_USB | |
74 | #define CONFIG_USB_ATMEL | |
75 | #define CONFIG_USB_OHCI_NEW | |
1dcdd862 MK |
76 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
77 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 | |
78 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" | |
79 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
1dcdd862 MK |
80 | #endif |
81 | ||
82 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 | |
83 | ||
84 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
85 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
86 | ||
fdc77189 | 87 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
1dcdd862 | 88 | #define CONFIG_ENV_OFFSET 0x2000 |
1dcdd862 | 89 | #define CONFIG_ENV_SIZE 0x2000 |
fdc77189 WY |
90 | #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
91 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 | |
1dcdd862 | 92 | #define CONFIG_BOOTCOMMAND "nboot 21000000 0" |
1dcdd862 | 93 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
43ede0bc | 94 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
1dcdd862 | 95 | |
1dcdd862 MK |
96 | #define CONFIG_CMDLINE_EDITING |
97 | #define CONFIG_AUTO_COMPLETE | |
1dcdd862 MK |
98 | #define CONFIG_SYS_LONGHELP |
99 | ||
100 | /* | |
101 | * Size of malloc() pool | |
102 | */ | |
103 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
104 | ||
105 | #endif |