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3bf801a2 AR |
1 | /* |
2 | * USB armory MkI board configuration settings | |
3 | * http://inversepath.com/usbarmory | |
4 | * | |
5 | * Copyright (C) 2015, Inverse Path | |
6 | * Andrej Rosano <andrej@inversepath.com> | |
7 | * | |
8 | * SPDX-License-Identifier:|____GPL-2.0+ | |
9 | */ | |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
18fb0e3c | 14 | #define CONFIG_SYS_FSL_CLK |
3bf801a2 AR |
15 | |
16 | #include <asm/arch/imx-regs.h> | |
3bf801a2 | 17 | |
3bf801a2 | 18 | /* U-Boot environment */ |
3bf801a2 AR |
19 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
20 | #define CONFIG_ENV_SIZE (8 * 1024) | |
3bf801a2 AR |
21 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
22 | ||
23 | /* U-Boot general configurations */ | |
24 | #define CONFIG_SYS_CBSIZE 512 | |
3bf801a2 AR |
25 | |
26 | /* UART */ | |
27 | #define CONFIG_MXC_UART | |
28 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
29 | #define CONFIG_CONS_INDEX 1 | |
3bf801a2 AR |
30 | |
31 | /* SD/MMC */ | |
3bf801a2 AR |
32 | #define CONFIG_FSL_ESDHC |
33 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
34 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
3bf801a2 AR |
35 | |
36 | /* USB */ | |
3bf801a2 | 37 | #define CONFIG_USB_EHCI_MX5 |
3bf801a2 AR |
38 | #define CONFIG_MXC_USB_PORT 1 |
39 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
40 | #define CONFIG_MXC_USB_FLAGS 0 | |
41 | ||
42 | /* I2C */ | |
3bf801a2 AR |
43 | #define CONFIG_SYS_I2C |
44 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
45 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
46 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
3bf801a2 AR |
47 | |
48 | /* Fuse */ | |
3bf801a2 AR |
49 | #define CONFIG_FSL_IIM |
50 | ||
9a45ec3e | 51 | /* U-Boot memory offsets */ |
3bf801a2 | 52 | #define CONFIG_LOADADDR 0x72000000 |
3bf801a2 | 53 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
9a45ec3e AR |
54 | |
55 | /* Linux boot */ | |
3bf801a2 AR |
56 | #define CONFIG_HOSTNAME usbarmory |
57 | #define CONFIG_BOOTCOMMAND \ | |
58 | "run distro_bootcmd; " \ | |
59 | "setenv bootargs console=${console} ${bootargs_default}; " \ | |
9a45ec3e | 60 | "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ |
3bf801a2 | 61 | "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ |
9a45ec3e | 62 | "bootz ${kernel_addr_r} - ${fdt_addr_r}" |
3bf801a2 AR |
63 | |
64 | #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) | |
65 | ||
66 | #include <config_distro_bootcmd.h> | |
67 | ||
68 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
69 | "kernel_addr_r=0x70800000\0" \ | |
70 | "fdt_addr_r=0x71000000\0" \ | |
71 | "scriptaddr=0x70800000\0" \ | |
72 | "pxefile_addr_r=0x70800000\0" \ | |
73 | "ramdisk_addr_r=0x73000000\0" | |
74 | ||
75 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
76 | MEM_LAYOUT_ENV_SETTINGS \ | |
77 | "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ | |
78 | "fdtfile=imx53-usbarmory.dtb\0" \ | |
79 | "console=ttymxc0,115200\0" \ | |
80 | BOOTENV | |
81 | ||
a02ab5ea | 82 | #ifndef CONFIG_CMDLINE |
a02ab5ea AR |
83 | #define USBARMORY_FIT_PATH "/boot/usbarmory.itb" |
84 | #define USBARMORY_FIT_ADDR "0x70800000" | |
85 | #endif | |
86 | ||
3bf801a2 AR |
87 | /* Physical Memory Map */ |
88 | #define CONFIG_NR_DRAM_BANKS 1 | |
89 | #define PHYS_SDRAM CSD0_BASE_ADDR | |
90 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
91 | ||
92 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
93 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
94 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
95 | ||
96 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
97 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
98 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
99 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
100 | ||
101 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
102 | #define CONFIG_SYS_MEMTEST_END 0x90000000 | |
103 | ||
104 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) | |
105 | ||
106 | #endif /* __CONFIG_H */ |