[people/ms/u-boot.git] / include / configs / vf610twr.h

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale Vybrid vf610twr board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

#define CONFIG_SYS_FSL_CLK

#define CONFIG_MACH_TYPE		4146

#define CONFIG_SKIP_LOWLEVEL_INIT

/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG

#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_NAND_ONFI_DETECTION

#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR

/* UBI */
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO

/* Dynamic MTD partition support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define MTDIDS_DEFAULT			"nand0=fsl_nfc"
#define MTDPARTS_DEFAULT		"mtdparts=fsl_nfc:"		\
					"128k(vf-bcb)ro,"		\
					"1408k(u-boot)ro,"		\
					"512k(u-boot-env),"		\
					"4m(kernel),"			\
					"512k(fdt),"		\
					"-(rootfs)"
#endif

#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_FEC_MXC_PHYADDR          0
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL

/* QSPI Configs*/

#ifdef CONFIG_FSL_QSPI
#define FSL_QSPI_FLASH_SIZE		(1 << 24)
#define FSL_QSPI_FLASH_NUM		2
#define CONFIG_SYS_FSL_QSPI_LE
#endif

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM		0


#define CONFIG_SYS_LOAD_ADDR		0x82000000

/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_SYS_TEXT_BASE		0x3f408000
#define CONFIG_BOARD_SIZE_LIMIT		524288

/*
 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
 * DDR3. Hence, limit the memory range for image processing to 112MB
 * using bootm_size. All of the following must be within this range.
 * We have the default load at 32MB into DDR (for the kernel), FDT at
 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
 * seen large trees). This allows a reasonable split between ramdisk
 * and kernel size, where the ram disk can be a bit larger.
 */
#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0x07000000\0" \
	"loadaddr=0x82000000\0" \
	"kernel_addr_r=0x82000000\0" \
	"fdt_addr=0x84000000\0" \
	"fdt_addr_r=0x84000000\0" \
	"rdaddr=0x84080000\0" \
	"ramdisk_addr_r=0x84080000\0"

#define CONFIG_EXTRA_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttyLP1\0" \
	"fdt_file=vf610-twr.dtb\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"update_sd_firmware_filename=u-boot.imx\0" \
	"update_sd_firmware=" \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"if mmc dev ${mmcdev}; then "	\
			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
				"setexpr fw_sz ${filesize} / 0x200; " \
				"setexpr fw_sz ${fw_sz} + 1; "	\
				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
			"fi; "	\
		"fi\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		\
			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START	0x80010000
#define CONFIG_SYS_MEMTEST_END		0x87C00000

/* Physical memory map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			(0x80000000)
#define PHYS_SDRAM_SIZE			(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0
#endif

#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE			(64 * 2048)
#define CONFIG_ENV_SECT_SIZE		(64 * 2048)
#define CONFIG_ENV_RANGE		(512 * 1024)
#define CONFIG_ENV_OFFSET		0x180000
#endif

#endif
Commit	Line	Data
8c653124 AW	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale Vybrid vf610twr board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
8c653124 AW	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#include <asm/arch/imx-regs.h>
8c653124	13
18fb0e3c	14	#define CONFIG_SYS_FSL_CLK
8c653124 AW	15
	16	#define CONFIG_MACH_TYPE 4146
	17
	18	#define CONFIG_SKIP_LOWLEVEL_INIT
	19
	20	/* Enable passing of ATAGs */
	21	#define CONFIG_CMDLINE_TAG
	22
8c653124 AW	23	#ifdef CONFIG_CMD_FUSE
	24	#define CONFIG_MXC_OCOTP
	25	#endif
	26
	27	/* Size of malloc() pool */
	28	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	29
8c653124 AW	30	/* Allow to overwrite serial and ethaddr */
8c653124 AW	31	#define CONFIG_ENV_OVERWRITE
8c653124	32
d6d07a9b SA	33	/* NAND support */
	34	#define CONFIG_CMD_NAND
	35	#define CONFIG_CMD_NAND_TRIMFFS
8fca2d8c	36	#define CONFIG_SYS_NAND_ONFI_DETECTION
d6d07a9b SA	37
d6d07a9b SA	38	#ifdef CONFIG_CMD_NAND
d6d07a9b SA	39	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	40	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
	41
	42	/* UBI */
d6d07a9b	43	#define CONFIG_CMD_UBIFS
d6d07a9b SA	44	#define CONFIG_RBTREE
d6d07a9b SA	45	#define CONFIG_LZO
d6d07a9b SA	46
	47	/* Dynamic MTD partition support */
	48	#define CONFIG_CMD_MTDPARTS
	49	#define CONFIG_MTD_PARTITIONS
	50	#define CONFIG_MTD_DEVICE
	51	#define MTDIDS_DEFAULT "nand0=fsl_nfc"
	52	#define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
	53	"128k(vf-bcb)ro," \
	54	"1408k(u-boot)ro," \
	55	"512k(u-boot-env)," \
	56	"4m(kernel)," \
	57	"512k(fdt)," \
	58	"-(rootfs)"
	59	#endif
	60
8c653124 AW	61	#define CONFIG_FSL_ESDHC
	62	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	63	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	64
8c653124 AW	65	#define CONFIG_FEC_MXC
	66	#define CONFIG_MII
	67	#define IMX_FEC_BASE ENET_BASE_ADDR
	68	#define CONFIG_FEC_XCV_TYPE RMII
	69	#define CONFIG_FEC_MXC_PHYADDR 0
	70	#define CONFIG_PHYLIB
	71	#define CONFIG_PHY_MICREL
	72
cb6d04d6	73	/* QSPI Configs*/
cb6d04d6 CF	74
cb6d04d6 CF	75	#ifdef CONFIG_FSL_QSPI
cb6d04d6 CF	76	#define FSL_QSPI_FLASH_SIZE (1 << 24)
	77	#define FSL_QSPI_FLASH_NUM 2
	78	#define CONFIG_SYS_FSL_QSPI_LE
	79	#endif
	80
1221b3d7	81	/* I2C Configs */
b089d039	82	#define CONFIG_SYS_I2C
b089d039	83	#define CONFIG_SYS_I2C_MXC
03544c66 AA	84	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	85	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
b089d039	86	#define CONFIG_SYS_SPD_BUS_NUM 0
1221b3d7	87
8c653124	88
cf04ad32	89	#define CONFIG_SYS_LOAD_ADDR 0x82000000
b188067f SA	90
	91	/* We boot from the gfxRAM area of the OCRAM. */
	92	#define CONFIG_SYS_TEXT_BASE 0x3f408000
	93	#define CONFIG_BOARD_SIZE_LIMIT 524288
8c653124	94
cf04ad32 SA	95	/*
	96	* We do have 128MB of memory on the Vybrid Tower board. Leave the last
	97	* 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
	98	* DDR3. Hence, limit the memory range for image processing to 112MB
	99	* using bootm_size. All of the following must be within this range.
	100	* We have the default load at 32MB into DDR (for the kernel), FDT at
	101	* 64MB and the ramdisk 512KB above that (allowing for hopefully never
	102	* seen large trees). This allows a reasonable split between ramdisk
	103	* and kernel size, where the ram disk can be a bit larger.
	104	*/
	105	#define MEM_LAYOUT_ENV_SETTINGS \
	106	"bootm_size=0x07000000\0" \
	107	"loadaddr=0x82000000\0" \
	108	"kernel_addr_r=0x82000000\0" \
	109	"fdt_addr=0x84000000\0" \
	110	"fdt_addr_r=0x84000000\0" \
	111	"rdaddr=0x84080000\0" \
	112	"ramdisk_addr_r=0x84080000\0"
	113
ca21f61e	114	#define CONFIG_EXTRA_ENV_SETTINGS \
cf04ad32	115	MEM_LAYOUT_ENV_SETTINGS \
ca21f61e	116	"script=boot.scr\0" \
c0a5b081	117	"image=zImage\0" \
ca21f61e	118	"console=ttyLP1\0" \
ca21f61e	119	"fdt_file=vf610-twr.dtb\0" \
ca21f61e OS	120	"boot_fdt=try\0" \
	121	"ip_dyn=yes\0" \
	122	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	123	"mmcpart=1\0" \
	124	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	125	"update_sd_firmware_filename=u-boot.imx\0" \
	126	"update_sd_firmware=" \
	127	"if test ${ip_dyn} = yes; then " \
	128	"setenv get_cmd dhcp; " \
	129	"else " \
	130	"setenv get_cmd tftp; " \
	131	"fi; " \
	132	"if mmc dev ${mmcdev}; then " \
	133	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
	134	"setexpr fw_sz ${filesize} / 0x200; " \
	135	"setexpr fw_sz ${fw_sz} + 1; " \
	136	"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
	137	"fi; " \
	138	"fi\0" \
	139	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	140	"root=${mmcroot}\0" \
	141	"loadbootscript=" \
	142	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	143	"bootscript=echo Running bootscript from mmc ...; " \
	144	"source\0" \
c0a5b081	145	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
ca21f61e OS	146	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	147	"mmcboot=echo Booting from mmc ...; " \
	148	"run mmcargs; " \
	149	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	150	"if run loadfdt; then " \
c0a5b081	151	"bootz ${loadaddr} - ${fdt_addr}; " \
ca21f61e OS	152	"else " \
ca21f61e OS	153	"if test ${boot_fdt} = try; then " \
c0a5b081	154	"bootz; " \
ca21f61e OS	155	"else " \
	156	"echo WARN: Cannot load the DT; " \
	157	"fi; " \
	158	"fi; " \
	159	"else " \
c0a5b081	160	"bootz; " \
ca21f61e OS	161	"fi;\0" \
	162	"netargs=setenv bootargs console=${console},${baudrate} " \
	163	"root=/dev/nfs " \
	164	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	165	"netboot=echo Booting from net ...; " \
	166	"run netargs; " \
	167	"if test ${ip_dyn} = yes; then " \
	168	"setenv get_cmd dhcp; " \
	169	"else " \
	170	"setenv get_cmd tftp; " \
	171	"fi; " \
c0a5b081	172	"${get_cmd} ${image}; " \
ca21f61e OS	173	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
ca21f61e OS	174	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
c0a5b081	175	"bootz ${loadaddr} - ${fdt_addr}; " \
ca21f61e OS	176	"else " \
ca21f61e OS	177	"if test ${boot_fdt} = try; then " \
c0a5b081	178	"bootz; " \
ca21f61e OS	179	"else " \
	180	"echo WARN: Cannot load the DT; " \
	181	"fi; " \
	182	"fi; " \
	183	"else " \
c0a5b081	184	"bootz; " \
ca21f61e OS	185	"fi;\0"
	186
	187	#define CONFIG_BOOTCOMMAND \
	188	"mmc dev ${mmcdev}; if mmc rescan; then " \
	189	"if run loadbootscript; then " \
	190	"run bootscript; " \
	191	"else " \
c0a5b081	192	"if run loadimage; then " \
ca21f61e OS	193	"run mmcboot; " \
	194	"else run netboot; " \
	195	"fi; " \
	196	"fi; " \
	197	"else run netboot; fi"
	198
8c653124 AW	199	/* Miscellaneous configurable options */
8c653124 AW	200	#define CONFIG_SYS_LONGHELP /* undef to save memory */
8c653124 AW	201	#undef CONFIG_AUTO_COMPLETE
	202	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	203	#define CONFIG_SYS_PBSIZE \
	204	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	205	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	206	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	207
8c653124 AW	208	#define CONFIG_SYS_MEMTEST_START 0x80010000
	209	#define CONFIG_SYS_MEMTEST_END 0x87C00000
	210
8c653124 AW	211	/* Physical memory map */
	212	#define CONFIG_NR_DRAM_BANKS 1
	213	#define PHYS_SDRAM (0x80000000)
	214	#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
	215
	216	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	217	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	218	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	219
	220	#define CONFIG_SYS_INIT_SP_OFFSET \
	221	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	222	#define CONFIG_SYS_INIT_SP_ADDR \
	223	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	224
d6d07a9b	225	#ifdef CONFIG_ENV_IS_IN_MMC
8c653124	226	#define CONFIG_ENV_SIZE (8 * 1024)
8c653124 AW	227
	228	#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
	229	#define CONFIG_SYS_MMC_ENV_DEV 0
d6d07a9b SA	230	#endif
	231
	232	#ifdef CONFIG_ENV_IS_IN_NAND
	233	#define CONFIG_ENV_SIZE (64 * 2048)
	234	#define CONFIG_ENV_SECT_SIZE (64 * 2048)
	235	#define CONFIG_ENV_RANGE (512 * 1024)
	236	#define CONFIG_ENV_OFFSET 0x180000
	237	#endif
8c653124	238
8c653124	239	#endif