[people/ms/u-boot.git] / include / configs / woodburn_common.h

/*
 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
 *
 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 *
 * Configuration for the woodburn board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __WOODBURN_COMMON_CONFIG_H
#define __WOODBURN_COMMON_CONFIG_H

#include <asm/arch/imx-regs.h>

 /* High Level Configuration Options */
#define CONFIG_MX35
#define CONFIG_MX35_HCLK_FREQ	24000000
#define CONFIG_SYS_FSL_CLK

#define CONFIG_SYS_DCACHE_OFF

#define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3

/* This is required to setup the ESDC controller */

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM		0

/* PMIC Controller */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_FSL
#define CONFIG_POWER_FSL_MC13892
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
#define CONFIG_RTC_MC13XXX

/* mmc driver */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

/*
 * UART (console)
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1

/*
 * Command definition
 */

#define CONFIG_NET_RETRY_COUNT	100


#define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */

/*
 * Ethernet on SOC (FEC)
 */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR	0x1

#define CONFIG_MII
#define CONFIG_DISCOVER_PHY

#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR

#define CONFIG_SYS_GBL_DATA_OFFSET	(LOW_LEVEL_SRAM_STACK - \
						IRAM_BASE_ADDR - \
						GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(IRAM_BASE_ADDR + \
					CONFIG_SYS_GBL_DATA_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_MTD_PARTITIONS

/*
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
#define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)

#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
				CONFIG_SYS_MONITOR_LEN)

/*
 * CFI FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER

/* A non-standard buffered write algorithm */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
#define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */

/*
 * NAND FLASH driver setup
 */
#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

#define CONFIG_SYS_NAND_ONFI_DETECTION

/*
 * Default environment and default scripts
 * to update uboot and load kernel
 */

#define CONFIG_HOSTNAME woodburn
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip_sta=setenv bootargs ${bootargs} "			\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
		"else run addip_sta;fi\0"	\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc0,${baudrate}\0"			\
	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
	"loadaddr=80800000\0"						\
	"kernel_addr_r=80800000\0"					\
	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr}\0"				\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r}\0"				\
	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
	"net_self=if run net_self_load;then "				\
		"run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
		"else echo Images not loades;fi\0"			\
	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
	"update=protect off ${uboot_addr} +80000;"			\
		"erase ${uboot_addr} +80000;"				\
		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
	"upd=if run load;then echo Updating u-boot;if run update;"	\
		"then echo U-Boot updated;"				\
			"else echo Error updating u-boot !;"		\
			"echo Board without bootloader !!;"		\
		"fi;"							\
		"else echo U-Boot not downloaded..exiting;fi\0"		\
	"bootcmd=run net_nfs\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
d81b27a2 SB	1	/*
	2	* (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
	3	*
	4	* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
	5	*
	6	* Configuration for the woodburn board.
	7	*
3765b3e7	8	* SPDX-License-Identifier: GPL-2.0+
d81b27a2 SB	9	*/
	10
	11	#ifndef __WOODBURN_COMMON_CONFIG_H
	12	#define __WOODBURN_COMMON_CONFIG_H
	13
	14	#include <asm/arch/imx-regs.h>
	15
	16	/* High Level Configuration Options */
d81b27a2 SB	17	#define CONFIG_MX35
d81b27a2 SB	18	#define CONFIG_MX35_HCLK_FREQ 24000000
18fb0e3c	19	#define CONFIG_SYS_FSL_CLK
d81b27a2 SB	20
d81b27a2 SB	21	#define CONFIG_SYS_DCACHE_OFF
d81b27a2	22
d81b27a2 SB	23	#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
	24
	25	/* This is required to setup the ESDC controller */
	26
	27	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	28	#define CONFIG_REVISION_TAG
	29	#define CONFIG_SETUP_MEMORY_TAGS
	30	#define CONFIG_INITRD_TAG
	31
	32	/*
	33	* Size of malloc() pool
	34	*/
	35	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
	36
	37	/*
	38	* Hardware drivers
	39	*/
b089d039	40	#define CONFIG_SYS_I2C
b089d039	41	#define CONFIG_SYS_I2C_MXC
03544c66 AA	42	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	43	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	44	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
b089d039	45	#define CONFIG_SYS_SPD_BUS_NUM 0
d81b27a2 SB	46
d81b27a2 SB	47	/* PMIC Controller */
05a860c2 SB	48	#define CONFIG_POWER
	49	#define CONFIG_POWER_I2C
	50	#define CONFIG_POWER_FSL
913702ca	51	#define CONFIG_POWER_FSL_MC13892
d81b27a2 SB	52	#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
	53	#define CONFIG_RTC_MC13XXX
	54
d81b27a2	55	/* mmc driver */
d81b27a2 SB	56	#define CONFIG_FSL_ESDHC
	57	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	58	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	59
	60	/*
	61	* UART (console)
	62	*/
	63	#define CONFIG_MXC_UART
	64	#define CONFIG_MXC_UART_BASE UART1_BASE
	65
	66	/* allow to overwrite serial and ethaddr */
	67	#define CONFIG_ENV_OVERWRITE
	68	#define CONFIG_CONS_INDEX 1
d81b27a2 SB	69
	70	/*
	71	* Command definition
	72	*/
d81b27a2	73
d81b27a2 SB	74	#define CONFIG_NET_RETRY_COUNT 100
d81b27a2 SB	75
d81b27a2 SB	76
	77	#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
	78
d81b27a2 SB	79	/*
	80	* Ethernet on SOC (FEC)
	81	*/
	82	#define CONFIG_FEC_MXC
	83	#define IMX_FEC_BASE FEC_BASE_ADDR
d81b27a2 SB	84	#define CONFIG_FEC_MXC_PHYADDR 0x1
	85
	86	#define CONFIG_MII
	87	#define CONFIG_DISCOVER_PHY
	88
	89	#define CONFIG_ARP_TIMEOUT 200UL
	90
	91	/*
	92	* Miscellaneous configurable options
	93	*/
d81b27a2 SB	94
	95	#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
	96	#define CONFIG_SYS_MEMTEST_END 0x10000
	97
d81b27a2 SB	98	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
d81b27a2 SB	99
d81b27a2 SB	100	/*
	101	* Physical Memory Map
	102	*/
	103	#define CONFIG_NR_DRAM_BANKS 1
	104	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
	105	#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
	106
	107	#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
	108
	109	#define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
	110	IRAM_BASE_ADDR - \
	111	GENERATED_GBL_DATA_SIZE)
	112	#define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
	113	CONFIG_SYS_GBL_DATA_OFFSET)
	114
	115	/*
	116	* MTD Command for mtdparts
	117	*/
d81b27a2 SB	118	#define CONFIG_MTD_DEVICE
	119	#define CONFIG_FLASH_CFI_MTD
	120	#define CONFIG_MTD_PARTITIONS
d81b27a2 SB	121
	122	/*
	123	* FLASH and environment organization
	124	*/
	125	#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
	126	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	127	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
	128	/* Monitor at beginning of flash */
	129	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	130	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	131
	132	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	133	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	134
	135	/* Address and size of Redundant Environment Sector */
	136	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	137	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	138
	139	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
	140	CONFIG_SYS_MONITOR_LEN)
	141
d81b27a2 SB	142	/*
	143	* CFI FLASH driver setup
	144	*/
	145	#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
	146	#define CONFIG_FLASH_CFI_DRIVER
	147
	148	/* A non-standard buffered write algorithm */
	149	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
	150	#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
	151
	152	/*
	153	* NAND FLASH driver setup
	154	*/
d81b27a2 SB	155	#define CONFIG_NAND_MXC_V1_1
	156	#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
	157	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	158	#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
	159	#define CONFIG_MXC_NAND_HWECC
	160	#define CONFIG_SYS_NAND_LARGEPAGE
	161
d81b27a2 SB	162	#define CONFIG_SYS_NAND_ONFI_DETECTION
	163
	164	/*
	165	* Default environment and default scripts
	166	* to update uboot and load kernel
	167	*/
d81b27a2 SB	168
	169	#define CONFIG_HOSTNAME woodburn
	170	#define CONFIG_EXTRA_ENV_SETTINGS \
	171	"netdev=eth0\0" \
	172	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	173	"nfsroot=${serverip}:${rootpath}\0" \
	174	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	175	"addip_sta=setenv bootargs ${bootargs} " \
	176	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	177	":${hostname}:${netdev}:off panic=1\0" \
	178	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
	179	"addip=if test -n ${ipdyn};then run addip_dyn;" \
	180	"else run addip_sta;fi\0" \
	181	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	182	"addtty=setenv bootargs ${bootargs}" \
	183	" console=ttymxc0,${baudrate}\0" \
	184	"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
	185	"loadaddr=80800000\0" \
	186	"kernel_addr_r=80800000\0" \
4a8c3f69 AG	187	"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
	188	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	189	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
d81b27a2 SB	190	"flash_self=run ramargs addip addtty addmtd addmisc;" \
	191	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	192	"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
	193	"bootm ${kernel_addr}\0" \
	194	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
	195	"run nfsargs addip addtty addmtd addmisc;" \
	196	"bootm ${kernel_addr_r}\0" \
	197	"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
	198	"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
	199	"net_self=if run net_self_load;then " \
	200	"run ramargs addip addtty addmtd addmisc;" \
	201	"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
	202	"else echo Images not loades;fi\0" \
4a8c3f69	203	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
d81b27a2	204	"load=tftp ${loadaddr} ${u-boot}\0" \
4a8c3f69	205	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
d81b27a2 SB	206	"update=protect off ${uboot_addr} +80000;" \
	207	"erase ${uboot_addr} +80000;" \
	208	"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
	209	"upd=if run load;then echo Updating u-boot;if run update;" \
	210	"then echo U-Boot updated;" \
	211	"else echo Error updating u-boot !;" \
	212	"echo Board without bootloader !!;" \
	213	"fi;" \
	214	"else echo U-Boot not downloaded..exiting;fi\0" \
	215	"bootcmd=run net_nfs\0"
	216
	217	#endif /* __CONFIG_H */