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39f0023e MW |
1 | /* |
2 | * (c) 2011 Graf-Syteco, Matthias Weisser | |
3 | * <weisserm@arcor.de> | |
4 | * | |
5 | * Configuation settings for the zmx25 board | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
39f0023e MW |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
3dae5b51 RH |
13 | #include <asm/arch/imx-regs.h> |
14 | ||
39f0023e | 15 | #define CONFIG_MX25 |
39f0023e MW |
16 | #define CONFIG_SYS_TEXT_BASE 0xA0000000 |
17 | ||
47d8ae40 | 18 | |
3dae5b51 RH |
19 | #define CONFIG_SYS_TIMER_RATE 32768 |
20 | #define CONFIG_SYS_TIMER_COUNTER \ | |
21 | (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) | |
22 | ||
9ba24f17 | 23 | #define CONFIG_MACH_TYPE MACH_TYPE_ZMX25 |
39f0023e MW |
24 | /* |
25 | * Environment settings | |
26 | */ | |
27 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
28 | "gs_fast_boot=setenv bootdelay 5\0" \ | |
29 | "gs_slow_boot=setenv bootdelay 10\0" \ | |
30 | "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \ | |
31 | "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \ | |
32 | "bootm 0x81000000; bootelf 0x81000000\0" | |
33 | ||
34 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
35 | #define CONFIG_SETUP_MEMORY_TAGS | |
36 | #define CONFIG_INITRD_TAG | |
9660e442 | 37 | #define CONFIG_BOARD_LATE_INIT |
39f0023e MW |
38 | |
39 | /* | |
40 | * Compressions | |
41 | */ | |
42 | #define CONFIG_LZO | |
43 | ||
44 | /* | |
45 | * Hardware drivers | |
46 | */ | |
47 | ||
48 | /* | |
49 | * GPIO | |
50 | */ | |
51 | #define CONFIG_MXC_GPIO | |
52 | ||
53 | /* | |
54 | * Serial | |
55 | */ | |
56 | #define CONFIG_MXC_UART | |
40f6fffe | 57 | #define CONFIG_MXC_UART_BASE UART2_BASE |
39f0023e MW |
58 | #define CONFIG_CONS_INDEX 1 /* use UART2 for console */ |
59 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
39f0023e MW |
60 | |
61 | /* | |
62 | * Ethernet | |
63 | */ | |
64 | #define CONFIG_FEC_MXC | |
65 | #define CONFIG_FEC_MXC_PHYADDR 0x00 | |
66 | #define CONFIG_MII | |
39f0023e MW |
67 | |
68 | /* | |
69 | * BOOTP options | |
70 | */ | |
71 | #define CONFIG_BOOTP_BOOTFILESIZE | |
72 | #define CONFIG_BOOTP_BOOTPATH | |
73 | #define CONFIG_BOOTP_GATEWAY | |
74 | #define CONFIG_BOOTP_HOSTNAME | |
75 | ||
76 | /* | |
77 | * Command line configuration. | |
78 | */ | |
39f0023e MW |
79 | #define CONFIG_CMD_CACHE |
80 | ||
39f0023e MW |
81 | /* |
82 | * Additional command | |
83 | */ | |
84 | #define CONFIG_CMD_DHCP | |
85 | #define CONFIG_CMD_PING | |
39f0023e MW |
86 | #define CONFIG_CMD_FAT |
87 | #define CONFIG_CMD_USB | |
88 | ||
39f0023e MW |
89 | |
90 | /* | |
91 | * USB | |
92 | */ | |
93 | #ifdef CONFIG_CMD_USB | |
94 | #define CONFIG_USB_EHCI /* Enable EHCI USB support */ | |
95 | #define CONFIG_USB_EHCI_MXC | |
96 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
9fa3d093 BT |
97 | #define CONFIG_MXC_USB_PORT 1 |
98 | #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL | |
99 | #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) | |
39f0023e MW |
100 | #define CONFIG_EHCI_IS_TDI |
101 | #define CONFIG_USB_STORAGE | |
102 | #define CONFIG_DOS_PARTITION | |
103 | #define CONFIG_SUPPORT_VFAT | |
104 | #endif /* CONFIG_CMD_USB */ | |
105 | ||
106 | /* SDRAM */ | |
107 | #define CONFIG_NR_DRAM_BANKS 1 | |
108 | #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ | |
109 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
110 | ||
111 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
112 | #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */ | |
113 | ||
114 | /* | |
115 | * FLASH and environment organization | |
116 | */ | |
117 | #define CONFIG_SYS_FLASH_BASE 0xA0000000 | |
118 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
119 | #define CONFIG_SYS_MAX_FLASH_SECT 256 | |
120 | ||
121 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) | |
122 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
123 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
124 | #define CONFIG_ENV_SIZE (128 * 1024) | |
125 | ||
126 | /* | |
127 | * CFI FLASH driver setup | |
128 | */ | |
129 | #define CONFIG_SYS_FLASH_CFI | |
130 | #define CONFIG_FLASH_CFI_DRIVER | |
131 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ | |
132 | ||
133 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE | |
134 | ||
135 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) | |
136 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) | |
137 | ||
39f0023e MW |
138 | #define CONFIG_SYS_CBSIZE 256 |
139 | #define CONFIG_SYS_MAXARGS 16 | |
140 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
141 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
142 | #define CONFIG_SYS_LONGHELP | |
143 | #define CONFIG_CMDLINE_EDITING | |
144 | ||
145 | #define CONFIG_PREBOOT "" | |
146 | ||
147 | #define CONFIG_BOOTDELAY 5 | |
39f0023e MW |
148 | |
149 | /* | |
150 | * Size of malloc() pool | |
151 | */ | |
152 | #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) | |
39f0023e MW |
153 | |
154 | #endif /* __CONFIG_H */ |