[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 - 2018 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

#define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
#define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)

/* Serial drivers */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

#define CONFIG_ARM_DCC

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_BOOTP_MAY_FAIL
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
#endif

/* QSPI */
#ifdef CONFIG_ZYNQ_QSPI
# define CONFIG_SF_DEFAULT_SPEED	30000000
# define CONFIG_SPI_FLASH_ISSI
#endif

/* NOR */
#ifdef CONFIG_MTD_NOR_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

#ifdef CONFIG_NAND_ZYNQ
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_MTD_DEVICE
#endif

/* MMC */
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
#endif

#ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI

# define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
# define DFU_DEFAULT_POLL_TIMEOUT	300
# define CONFIG_USB_CABLE_CHECK
# define CONFIG_THOR_RESET_OFF
# define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"set dfu_alt_info " \
	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	"${ramdisk_image} ram 0x2000000 0x600000\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

# if defined(CONFIG_MMC_SDHCI_ZYNQ)
#  define DFU_ALT_INFO_MMC \
	"dfu_mmc_info=" \
	"set dfu_alt_info " \
	"${kernel_image} fat 0 1\\\\;" \
	"${devicetree_image} fat 0 1\\\\;" \
	"${ramdisk_image} fat 0 1\0" \
	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"

#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_MMC
# else
#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM
# endif
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
#define CONFIG_SYS_I2C_ZYNQ
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
#endif

/* enable preboot to be loaded before CONFIG_BOOTDELAY */
#define CONFIG_PREBOOT

/* Boot configuration */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Distro boot enablement */

#ifdef CONFIG_SPL_BUILD
#define BOOTENV
#else
#include <config_distro_defaults.h>

#ifdef CONFIG_CMD_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#endif

#ifdef CONFIG_CMD_USB
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

#if defined(CONFIG_CMD_PXE)
#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
#define BOOT_TARGET_DEVICES_PXE(func)
#endif

#if defined(CONFIG_CMD_DHCP)
#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
#else
#define BOOT_TARGET_DEVICES_DHCP(func)
#endif

#define BOOT_TARGET_DEVICES(func) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	BOOT_TARGET_DEVICES_PXE(func) \
	BOOT_TARGET_DEVICES_DHCP(func)

#include <config_distro_bootcmd.h>
#endif /* CONFIG_SPL_BUILD */

/* Default environment */
#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"loadbootenv_addr=0x2000000\0" \
	"fdt_addr_r=0x1f00000\0"        \
	"pxefile_addr_r=0x2000000\0"    \
	"kernel_addr_r=0x2000000\0"     \
	"scriptaddr=0x3000000\0"        \
	"ramdisk_addr_r=0x3100000\0"    \
	"bootenv=uEnv.txt\0" \
	"bootenv_dev=mmc\0" \
	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
		"env import -t ${loadbootenv_addr} $filesize\0" \
	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
	"setbootenv=if env run bootenv_existence_test; then " \
			"if env run loadbootenv; then " \
				"env run importbootenv; " \
			"fi; " \
		"fi; \0" \
	"sd_loadbootenv=set bootenv_dev mmc && " \
			"run setbootenv \0" \
	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
	"preboot=if test $modeboot = sdboot; then " \
			"run sd_loadbootenv; " \
			"echo Checking if uenvcmd is set ...; " \
			"if test -n $uenvcmd; then " \
				"echo Running uenvcmd ...; " \
				"run uenvcmd; " \
			"fi; " \
		"fi; \0" \
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"load mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"load usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}; fi\0" \
		DFU_ALT_INFO \
		BOOTENV
#endif

/* Miscellaneous configurable options */

#define CONFIG_CLOCKS
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */

#ifndef CONFIG_NR_DRAM_BANKS
# define CONFIG_NR_DRAM_BANKS		1
#endif

#define CONFIG_SYS_MEMTEST_START	0
#define CONFIG_SYS_MEMTEST_END		0x1000

#define CONFIG_SYS_MALLOC_LEN		0x1400000

#define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA_ZYNQPL

/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#define CONFIG_SYS_MMC_MAX_DEVICE	1

#define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"

/* Commands */

/* SPL part */

/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
					CONFIG_SYS_SPI_ARGS_SIZE)
#endif

/* for booting directly linux */

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	CONFIG_SPL_STACK_R_ADDR
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000000

/*
 * SPL stack position - and stack goes down
 * 0xfffffe00 is used for putting wfi loop.
 * Set it up as limit for now.
 */
#define CONFIG_SPL_STACK	0xfffffe00

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE

#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3e1b61de	3	* (C) Copyright 2013 - 2018 Xilinx, Inc.
06fe8dae JT	4	*
06fe8dae JT	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
f22651cf	13	/* CPU clock */
53e49f74 JT	14	#ifndef CONFIG_CPU_FREQ_HZ
	15	# define CONFIG_CPU_FREQ_HZ 800000000
	16	#endif
f22651cf	17
8cfac504	18	/* Cache options */
8cfac504 JT	19	#define CONFIG_SYS_L2CACHE_OFF
	20	#ifndef CONFIG_SYS_L2CACHE_OFF
	21	# define CONFIG_SYS_L2_PL310
	22	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	23	#endif
	24
a2ec7fb9 MS	25	#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
	26	#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
	27	#define CONFIG_SYS_TIMER_COUNTS_DOWN
	28	#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
	29
53e49f74	30	/* Serial drivers */
f22651cf MS	31	/* The following table includes the supported baudrates */
	32	#define CONFIG_SYS_BAUDRATE_TABLE \
	33	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	34
636ac181	35	#define CONFIG_ARM_DCC
53e49f74	36
f22651cf	37	/* Ethernet driver */
596e5782	38	#if defined(CONFIG_ZYNQ_GEM)
88fcfb1c JT	39	# define CONFIG_MII
88fcfb1c JT	40	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
dd1c351f	41	# define CONFIG_BOOTP_MAY_FAIL
88fcfb1c	42	#endif
f22651cf	43
53e49f74 JT	44	/* SPI */
53e49f74 JT	45	#ifdef CONFIG_ZYNQ_SPI
53e49f74 JT	46	#endif
53e49f74 JT	47
a241d4ec JT	48	/* QSPI */
	49	#ifdef CONFIG_ZYNQ_QSPI
	50	# define CONFIG_SF_DEFAULT_SPEED 30000000
232a8e4e	51	# define CONFIG_SPI_FLASH_ISSI
a241d4ec JT	52	#endif
a241d4ec JT	53
fe5eddbf	54	/* NOR */
e856bdcf	55	#ifdef CONFIG_MTD_NOR_FLASH
fe5eddbf JT	56	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	57	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	58	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	59	# define CONFIG_SYS_MAX_FLASH_SECT 512
	60	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	61	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	62	# define CONFIG_FLASH_SHOW_PROGRESS 10
	63	# define CONFIG_SYS_FLASH_CFI
	64	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	65	# define CONFIG_FLASH_CFI_DRIVER
	66	# undef CONFIG_SYS_FLASH_PROTECTION
	67	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	68	#endif
	69
ba8adb26	70	#ifdef CONFIG_NAND_ZYNQ
ba8adb26 SDPP	71	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	72	#define CONFIG_SYS_NAND_ONFI_DETECTION
	73	#define CONFIG_MTD_DEVICE
	74	#endif
	75
293eb33f	76	/* MMC */
08aa0334	77	#if defined(CONFIG_MMC_SDHCI_ZYNQ)
f3bd7280	78	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
293eb33f MS	79	#endif
293eb33f MS	80
2cdc778b	81	#ifdef CONFIG_USB_EHCI_ZYNQ
c6024c8e	82	# define CONFIG_EHCI_IS_TDI
87f3dbdf	83
87f3dbdf SDPP	84	# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
87f3dbdf SDPP	85	# define DFU_DEFAULT_POLL_TIMEOUT 300
87f3dbdf	86	# define CONFIG_USB_CABLE_CHECK
1e8d3830	87	# define CONFIG_THOR_RESET_OFF
87f3dbdf SDPP	88	# define DFU_ALT_INFO_RAM \
	89	"dfu_ram_info=" \
	90	"set dfu_alt_info " \
	91	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	92	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	93	"${ramdisk_image} ram 0x2000000 0x600000\0" \
c4fa5114 SDPP	94	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
c4fa5114 SDPP	95	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
87f3dbdf	96
08aa0334	97	# if defined(CONFIG_MMC_SDHCI_ZYNQ)
87f3dbdf SDPP	98	# define DFU_ALT_INFO_MMC \
	99	"dfu_mmc_info=" \
	100	"set dfu_alt_info " \
	101	"${kernel_image} fat 0 1\\\\;" \
	102	"${devicetree_image} fat 0 1\\\\;" \
	103	"${ramdisk_image} fat 0 1\0" \
c4fa5114 SDPP	104	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	105	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
	106
87f3dbdf SDPP	107	# define DFU_ALT_INFO \
	108	DFU_ALT_INFO_RAM \
	109	DFU_ALT_INFO_MMC
	110	# else
	111	# define DFU_ALT_INFO \
	112	DFU_ALT_INFO_RAM
	113	# endif
	114	#endif
	115
	116	#if !defined(DFU_ALT_INFO)
	117	# define DFU_ALT_INFO
c6024c8e SDPP	118	#endif
c6024c8e SDPP	119
1c3f2c72	120	#if defined(CONFIG_ZYNQ_I2C0) \|\| defined(CONFIG_ZYNQ_I2C1)
18948632	121	#define CONFIG_SYS_I2C_ZYNQ
1c3f2c72 SDPP	122	#endif
1c3f2c72 SDPP	123
8934f784	124	/* I2C */
18948632	125	#if defined(CONFIG_SYS_I2C_ZYNQ)
0bdffe71	126	# define CONFIG_SYS_I2C
0bdffe71	127	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	128	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	129	#endif
8934f784 MS	130
65da1efd JT	131	/* EEPROM */
65da1efd JT	132	#ifdef CONFIG_ZYNQ_EEPROM
65da1efd JT	133	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	134	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	135	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	136	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	137	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	138	#endif
	139
18eee22f JT	140	/* Total Size of Environment Sector */
	141	#define CONFIG_ENV_SIZE (128 << 10)
	142
b660ca13 JT	143	/* Allow to overwrite serial and ethaddr */
	144	#define CONFIG_ENV_OVERWRITE
	145
f22651cf	146	/* Environment */
ed53e4d6	147	#ifndef CONFIG_ENV_IS_NOWHERE
ed53e4d6 JT	148	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
ed53e4d6 JT	149	# define CONFIG_ENV_OFFSET 0xE0000
ed53e4d6	150	#endif
e83f61a6	151
4d1ed9c7 MS	152	/* enable preboot to be loaded before CONFIG_BOOTDELAY */
	153	#define CONFIG_PREBOOT
	154
61d8eeb0	155	/* Boot configuration */
61d8eeb0 AG	156	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
	157
	158	/* Distro boot enablement */
	159
	160	#ifdef CONFIG_SPL_BUILD
	161	#define BOOTENV
	162	#else
	163	#include <config_distro_defaults.h>
	164
	165	#ifdef CONFIG_CMD_MMC
	166	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
	167	#else
	168	#define BOOT_TARGET_DEVICES_MMC(func)
	169	#endif
	170
	171	#ifdef CONFIG_CMD_USB
	172	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	173	#else
	174	#define BOOT_TARGET_DEVICES_USB(func)
	175	#endif
	176
	177	#if defined(CONFIG_CMD_PXE)
	178	#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
	179	#else
	180	#define BOOT_TARGET_DEVICES_PXE(func)
	181	#endif
	182
	183	#if defined(CONFIG_CMD_DHCP)
	184	#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
	185	#else
	186	#define BOOT_TARGET_DEVICES_DHCP(func)
	187	#endif
	188
	189	#define BOOT_TARGET_DEVICES(func) \
	190	BOOT_TARGET_DEVICES_MMC(func) \
	191	BOOT_TARGET_DEVICES_USB(func) \
	192	BOOT_TARGET_DEVICES_PXE(func) \
	193	BOOT_TARGET_DEVICES_DHCP(func)
	194
	195	#include <config_distro_bootcmd.h>
	196	#endif /* CONFIG_SPL_BUILD */
	197
e83f61a6	198	/* Default environment */
b7b3efe7	199	#ifndef CONFIG_EXTRA_ENV_SETTINGS
e83f61a6 JT	200	#define CONFIG_EXTRA_ENV_SETTINGS \
	201	"fit_image=fit.itb\0" \
	202	"load_addr=0x2000000\0" \
	203	"fit_size=0x800000\0" \
	204	"flash_off=0x100000\0" \
	205	"nor_flash_off=0xE2100000\0" \
	206	"fdt_high=0x20000000\0" \
	207	"initrd_high=0x20000000\0" \
4d1ed9c7	208	"loadbootenv_addr=0x2000000\0" \
61d8eeb0 AG	209	"fdt_addr_r=0x1f00000\0" \
	210	"pxefile_addr_r=0x2000000\0" \
	211	"kernel_addr_r=0x2000000\0" \
	212	"scriptaddr=0x3000000\0" \
	213	"ramdisk_addr_r=0x3100000\0" \
4d1ed9c7 MS	214	"bootenv=uEnv.txt\0" \
	215	"bootenv_dev=mmc\0" \
	216	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
	217	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
	218	"env import -t ${loadbootenv_addr} $filesize\0" \
	219	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
	220	"setbootenv=if env run bootenv_existence_test; then " \
	221	"if env run loadbootenv; then " \
	222	"env run importbootenv; " \
	223	"fi; " \
	224	"fi; \0" \
	225	"sd_loadbootenv=set bootenv_dev mmc && " \
	226	"run setbootenv \0" \
	227	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
	228	"preboot=if test $modeboot = sdboot; then " \
	229	"run sd_loadbootenv; " \
	230	"echo Checking if uenvcmd is set ...; " \
	231	"if test -n $uenvcmd; then " \
	232	"echo Running uenvcmd ...; " \
	233	"run uenvcmd; " \
	234	"fi; " \
	235	"fi; \0" \
e83f61a6 JT	236	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	237	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	238	"bootm ${load_addr}\0" \
	239	"sdboot=echo Copying FIT from SD to RAM... && " \
e9d69c1c	240	"load mmc 0 ${load_addr} ${fit_image} && " \
e83f61a6 JT	241	"bootm ${load_addr}\0" \
e83f61a6 JT	242	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	243	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	244	"bootm ${load_addr}\0" \
	245	"usbboot=if usb start; then " \
	246	"echo Copying FIT from USB to RAM... && " \
e9d69c1c	247	"load usb 0 ${load_addr} ${fit_image} && " \
39bc1a8c	248	"bootm ${load_addr}; fi\0" \
61d8eeb0 AG	249	DFU_ALT_INFO \
61d8eeb0 AG	250	BOOTENV
b7b3efe7	251	#endif
c6024c8e	252
36e0e197	253	/* Miscellaneous configurable options */
36e0e197	254
6c3e61de	255	#define CONFIG_CLOCKS
841426ad	256	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
f22651cf	257
758f29d0 MS	258	#ifndef CONFIG_NR_DRAM_BANKS
	259	# define CONFIG_NR_DRAM_BANKS 1
	260	#endif
7cd04192	261
c1584e2a MS	262	#define CONFIG_SYS_MEMTEST_START 0
c1584e2a MS	263	#define CONFIG_SYS_MEMTEST_END 0x1000
7cd04192	264
599807fc	265	#define CONFIG_SYS_MALLOC_LEN 0x1400000
c1584e2a MS	266
	267	#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
	268	#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
7cd04192 JT	269	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	270	CONFIG_SYS_INIT_RAM_SIZE - \
	271	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	272
53e49f74 JT	273	/* Enable the PL to be downloaded */
53e49f74	274	#define CONFIG_FPGA_ZYNQPL
53e49f74	275
53e49f74	276	/* FIT support */
21d29f7f	277	#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
f22651cf	278
ae9f4899	279	/* Extend size of kernel image for uncompression */
3d456eec	280	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	281
09ed635b	282	/* Boot FreeBSD/vxWorks from an ELF image */
d82d63cc	283	#define CONFIG_SYS_MMC_MAX_DEVICE 1
09ed635b	284
0107f240	285	#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
38716189	286
f22651cf	287	/* Commands */
f22651cf	288
d7e269cf	289	/* SPL part */
d7e269cf	290
d7e269cf	291	/* MMC support */
08aa0334	292	#ifdef CONFIG_MMC_SDHCI_ZYNQ
e2ccdf89	293	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
7f307d93	294	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
0dfbcf02 MY	295	#endif
	296
	297	/* Disable dcache for SPL just for sure */
	298	#ifdef CONFIG_SPL_BUILD
	299	#define CONFIG_SYS_DCACHE_OFF
d7e269cf MS	300	#endif
	301
	302	/* Address in RAM where the parameters must be copied by SPL. */
	303	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	304
205b4f33 GG	305	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
205b4f33 GG	306	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
d7e269cf MS	307
	308	/* Not using MMC raw mode - just for compilation purpose */
	309	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	310	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	311	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	312
	313	/* qspi mode is working fine */
	314	#ifdef CONFIG_ZYNQ_QSPI
d7e269cf	315	#define CONFIG_SPL_SPI_LOAD
d7e269cf	316	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
8e0e01d3 SDPP	317	#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
	318	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	319	#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
	320	CONFIG_SYS_SPI_ARGS_SIZE)
d7e269cf MS	321	#endif
	322
	323	/* for booting directly linux */
d7e269cf MS	324
	325	/* SP location before relocation, must use scratch RAM */
	326	#define CONFIG_SPL_TEXT_BASE 0x0
	327
	328	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	329	#define CONFIG_SPL_MAX_SIZE 0x30000
	330
d7e269cf	331	/* On the top of OCM space */
52b36fd1 MS	332	#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
52b36fd1 MS	333	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
d7e269cf	334
83b6464d MS	335	/*
	336	* SPL stack position - and stack goes down
	337	* 0xfffffe00 is used for putting wfi loop.
	338	* Set it up as limit for now.
	339	*/
	340	#define CONFIG_SPL_STACK 0xfffffe00
	341
d7e269cf MS	342	/* BSS setup */
	343	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	344	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	345
	346	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	347
06fe8dae	348	#endif /* __CONFIG_ZYNQ_COMMON_H */