projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 0f89ba43 WD |
1 | /* |
| 2 | * definitions for MPC8260 I/O Ports | |
| 3 | * | |
| 4 | * (in addition to those provided in <asm/immap_8260.h>) | |
| 5 | * | |
| 6 | * Murray.Jensen@cmst.csiro.au, 20-Oct-00 | |
| 7 | */ | |
| 8 | ||
| 9 | /* | |
| 10 | * this structure mirrors the layout of the five port registers in | |
| 11 | * the internal memory map - see iop8260_t in <asm/immap_8260.h> | |
| 12 | */ | |
| 13 | typedef struct { | |
| 14 | unsigned int pdir; /* Port Data Direction Register (35-3) */ | |
| 15 | unsigned int ppar; /* Port Pin Assignment Register (35-4) */ | |
| 16 | unsigned int psor; /* Port Special Options Register (35-5) */ | |
| 17 | unsigned int podr; /* Port Open Drain Register (35-2) */ | |
| 18 | unsigned int pdat; /* Port Data Register (35-3) */ | |
| 19 | } ioport_t; | |
| 20 | ||
| 21 | /* | |
| 22 | * this macro calculates the address within the internal | |
| 23 | * memory map (im) of the set of registers for a port (idx) | |
| 24 | * | |
| 25 | * the internal memory map aligns the above structure on | |
| 26 | * a 0x20 byte boundary | |
| 27 | */ | |
| 9c4c5ae3 | 28 | #ifdef CONFIG_MPC85xx |
| aafeefbd | 29 | #define ioport_addr(im, idx) (ioport_t *)((uint)&(im->im_cpm_iop) + ((idx)*0x20)) |
| 42d1f039 | 30 | #else |
| 0f89ba43 | 31 | #define ioport_addr(im, idx) (ioport_t *)((uint)&(im)->im_ioport + ((idx)*0x20)) |
| 42d1f039 | 32 | #endif |
| 0f89ba43 WD |
33 | |
| 34 | /* | |
| 35 | * this structure provides configuration | |
| 36 | * information for one port pin | |
| 37 | */ | |
| 38 | typedef struct { | |
| 39 | unsigned char conf:1; /* if 1, configure this port */ | |
| 40 | unsigned char ppar:1; /* Port Pin Assignment Register (35-4) */ | |
| 41 | unsigned char psor:1; /* Port Special Options Register (35-2) */ | |
| 42 | unsigned char pdir:1; /* Port Data Direction Register (35-3) */ | |
| 43 | unsigned char podr:1; /* Port Open Drain Register (35-2) */ | |
| 44 | unsigned char pdat:1; /* Port Data Register (35-2) */ | |
| 45 | } iop_conf_t; | |
| 46 | ||
| 47 | /* | |
| 48 | * a table that contains configuration information for all 32 pins | |
| 49 | * of all four MPC8260 I/O ports. | |
| 50 | * | |
| 51 | * NOTE: in the second dimension of this table, index 0 refers to pin 31 | |
| 52 | * and index 31 refers to pin 0. this made the code in the table look more | |
| 53 | * like the table in the 8260UM (and in the hymod manuals). | |
| 54 | */ | |
| 55 | extern const iop_conf_t iop_conf_tab[4][32]; | |
| 7737d5c6 DL |
56 | |
| 57 | typedef struct { | |
| 58 | unsigned char port; | |
| 59 | unsigned char pin; | |
| 60 | int dir; | |
| 61 | int open_drain; | |
| 62 | int assign; | |
| 63 | } qe_iop_conf_t; | |
| 64 | ||
| 65 | #define QE_IOP_TAB_END (-1) |