projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 55978deb WD |
1 | /* |
| 2 | * MPC823 LCD and Video Controller | |
| 3 | * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) | |
| 4 | */ | |
| 5 | #ifndef __LCDVIDEO_H__ | |
| 6 | #define __LCDVIDEO_H__ | |
| 7 | ||
| 8 | ||
| 9 | /* LCD Controller Configuration Register. | |
| 10 | */ | |
| 11 | #define LCCR_BNUM ((uint)0xfffe0000) | |
| 12 | #define LCCR_EIEN ((uint)0x00010000) | |
| 13 | #define LCCR_IEN ((uint)0x00008000) | |
| 14 | #define LCCR_IRQL ((uint)0x00007000) | |
| 15 | #define LCCR_CLKP ((uint)0x00000800) | |
| 16 | #define LCCR_OEP ((uint)0x00000400) | |
| 17 | #define LCCR_HSP ((uint)0x00000200) | |
| 18 | #define LCCR_VSP ((uint)0x00000100) | |
| 19 | #define LCCR_DP ((uint)0x00000080) | |
| 20 | #define LCCR_BPIX ((uint)0x00000060) | |
| 21 | #define LCCR_LBW ((uint)0x00000010) | |
| 22 | #define LCCR_SPLT ((uint)0x00000008) | |
| 23 | #define LCCR_CLOR ((uint)0x00000004) | |
| 24 | #define LCCR_TFT ((uint)0x00000002) | |
| 25 | #define LCCR_PON ((uint)0x00000001) | |
| 26 | ||
| 27 | /* Define the bit shifts to load values into the register. | |
| 28 | */ | |
| 29 | #define LCDBIT(BIT, VAL) ((VAL) << (31 - BIT)) | |
| 30 | ||
| 31 | #define LCCR_BNUM_BIT ((uint)14) | |
| 32 | #define LCCR_EIEN_BIT ((uint)15) | |
| 33 | #define LCCR_IEN_BIT ((uint)16) | |
| 34 | #define LCCR_IROL_BIT ((uint)19) | |
| 35 | #define LCCR_CLKP_BIT ((uint)20) | |
| 36 | #define LCCR_OEP_BIT ((uint)21) | |
| 37 | #define LCCR_HSP_BIT ((uint)22) | |
| 38 | #define LCCR_VSP_BIT ((uint)23) | |
| 39 | #define LCCR_DP_BIT ((uint)24) | |
| 40 | #define LCCR_BPIX_BIT ((uint)26) | |
| 41 | #define LCCR_LBW_BIT ((uint)27) | |
| 42 | #define LCCR_SPLT_BIT ((uint)28) | |
| 43 | #define LCCR_CLOR_BIT ((uint)29) | |
| 44 | #define LCCR_TFT_BIT ((uint)30) | |
| 45 | #define LCCR_PON_BIT ((uint)31) | |
| 46 | ||
| 47 | /* LCD Horizontal control register. | |
| 48 | */ | |
| 49 | #define LCHCR_BO ((uint)0x01000000) | |
| 50 | #define LCHCR_AT ((uint)0x00e00000) | |
| 51 | #define LCHCR_HPC ((uint)0x001ffc00) | |
| 52 | #define LCHCR_WBL ((uint)0x000003ff) | |
| 53 | ||
| 54 | #define LCHCR_AT_BIT ((uint)10) | |
| 55 | #define LCHCR_HPC_BIT ((uint)21) | |
| 56 | #define LCHCR_WBL_BIT ((uint)31) | |
| 57 | ||
| 58 | /* LCD Vertical control register. | |
| 59 | */ | |
| 60 | #define LCVCR_VPW ((uint)0xf0000000) | |
| 61 | #define LCVCR_LCD_AC ((uint)0x01e00000) | |
| 62 | #define LCVCR_VPC ((uint)0x001ff800) | |
| 63 | #define LCVCR_WBF ((uint)0x000003ff) | |
| 64 | ||
| 65 | #define LCVCR_VPW_BIT ((uint)3) | |
| 66 | #define LCVCR_LCD_AC_BIT ((uint)10) | |
| 67 | #define LCVCR_VPC_BIT ((uint)20) | |
| 68 | ||
| 69 | #endif /* __LCDVIDEO_H__ */ |