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cfa460ad WJ |
1 | /* |
2 | * Linux driver for Disk-On-Chip devices | |
3 | * | |
4 | * Copyright (C) 1999 Machine Vision Holdings, Inc. | |
5 | * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org> | |
6 | * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com> | |
7 | * Copyright (C) 2002-2003 SnapGear Inc | |
8 | * | |
cfa460ad WJ |
9 | * Released under GPL |
10 | */ | |
012771d8 WD |
11 | |
12 | #ifndef __MTD_DOC2000_H__ | |
13 | #define __MTD_DOC2000_H__ | |
14 | ||
cfa460ad WJ |
15 | #include <linux/mtd/mtd.h> |
16 | #if 0 | |
17 | #include <linux/mutex.h> | |
18 | #endif | |
012771d8 WD |
19 | |
20 | #define DoC_Sig1 0 | |
21 | #define DoC_Sig2 1 | |
22 | ||
23 | #define DoC_ChipID 0x1000 | |
24 | #define DoC_DOCStatus 0x1001 | |
25 | #define DoC_DOCControl 0x1002 | |
26 | #define DoC_FloorSelect 0x1003 | |
27 | #define DoC_CDSNControl 0x1004 | |
53677ef1 WD |
28 | #define DoC_CDSNDeviceSelect 0x1005 |
29 | #define DoC_ECCConf 0x1006 | |
012771d8 WD |
30 | #define DoC_2k_ECCStatus 0x1007 |
31 | ||
32 | #define DoC_CDSNSlowIO 0x100d | |
33 | #define DoC_ECCSyndrome0 0x1010 | |
34 | #define DoC_ECCSyndrome1 0x1011 | |
35 | #define DoC_ECCSyndrome2 0x1012 | |
36 | #define DoC_ECCSyndrome3 0x1013 | |
37 | #define DoC_ECCSyndrome4 0x1014 | |
38 | #define DoC_ECCSyndrome5 0x1015 | |
53677ef1 | 39 | #define DoC_AliasResolution 0x101b |
012771d8 | 40 | #define DoC_ConfigInput 0x101c |
53677ef1 WD |
41 | #define DoC_ReadPipeInit 0x101d |
42 | #define DoC_WritePipeTerm 0x101e | |
43 | #define DoC_LastDataRead 0x101f | |
44 | #define DoC_NOP 0x1020 | |
012771d8 | 45 | |
53677ef1 WD |
46 | #define DoC_Mil_CDSN_IO 0x0800 |
47 | #define DoC_2k_CDSN_IO 0x1800 | |
012771d8 | 48 | |
cfa460ad WJ |
49 | #define DoC_Mplus_NOP 0x1002 |
50 | #define DoC_Mplus_AliasResolution 0x1004 | |
51 | #define DoC_Mplus_DOCControl 0x1006 | |
52 | #define DoC_Mplus_AccessStatus 0x1008 | |
53 | #define DoC_Mplus_DeviceSelect 0x1008 | |
54 | #define DoC_Mplus_Configuration 0x100a | |
55 | #define DoC_Mplus_OutputControl 0x100c | |
56 | #define DoC_Mplus_FlashControl 0x1020 | |
57 | #define DoC_Mplus_FlashSelect 0x1022 | |
58 | #define DoC_Mplus_FlashCmd 0x1024 | |
59 | #define DoC_Mplus_FlashAddress 0x1026 | |
60 | #define DoC_Mplus_FlashData0 0x1028 | |
61 | #define DoC_Mplus_FlashData1 0x1029 | |
62 | #define DoC_Mplus_ReadPipeInit 0x102a | |
63 | #define DoC_Mplus_LastDataRead 0x102c | |
64 | #define DoC_Mplus_LastDataRead1 0x102d | |
65 | #define DoC_Mplus_WritePipeTerm 0x102e | |
66 | #define DoC_Mplus_ECCSyndrome0 0x1040 | |
67 | #define DoC_Mplus_ECCSyndrome1 0x1041 | |
68 | #define DoC_Mplus_ECCSyndrome2 0x1042 | |
69 | #define DoC_Mplus_ECCSyndrome3 0x1043 | |
70 | #define DoC_Mplus_ECCSyndrome4 0x1044 | |
71 | #define DoC_Mplus_ECCSyndrome5 0x1045 | |
72 | #define DoC_Mplus_ECCConf 0x1046 | |
73 | #define DoC_Mplus_Toggle 0x1046 | |
74 | #define DoC_Mplus_DownloadStatus 0x1074 | |
75 | #define DoC_Mplus_CtrlConfirm 0x1076 | |
76 | #define DoC_Mplus_Power 0x1fff | |
77 | ||
78 | /* How to access the device? | |
79 | * On ARM, it'll be mmap'd directly with 32-bit wide accesses. | |
80 | * On PPC, it's mmap'd and 16-bit wide. | |
81 | * Others use readb/writeb | |
82 | */ | |
83 | #if defined(__arm__) | |
84 | #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)))) | |
85 | #define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0) | |
86 | #define DOC_IOREMAP_LEN 0x8000 | |
87 | #elif defined(__ppc__) | |
88 | #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)))) | |
89 | #define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0) | |
90 | #define DOC_IOREMAP_LEN 0x4000 | |
91 | #else | |
92 | #define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) | |
93 | #define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) | |
94 | #define DOC_IOREMAP_LEN 0x2000 | |
95 | ||
96 | #endif | |
97 | ||
98 | #if defined(__i386__) || defined(__x86_64__) | |
99 | #define USE_MEMCPY | |
100 | #endif | |
012771d8 WD |
101 | |
102 | /* These are provided to directly use the DoC_xxx defines */ | |
103 | #define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) | |
104 | #define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) | |
105 | ||
53677ef1 WD |
106 | #define DOC_MODE_RESET 0 |
107 | #define DOC_MODE_NORMAL 1 | |
108 | #define DOC_MODE_RESERVED1 2 | |
109 | #define DOC_MODE_RESERVED2 3 | |
110 | ||
53677ef1 | 111 | #define DOC_MODE_CLR_ERR 0x80 |
cfa460ad WJ |
112 | #define DOC_MODE_RST_LAT 0x10 |
113 | #define DOC_MODE_BDECT 0x08 | |
114 | #define DOC_MODE_MDWREN 0x04 | |
53677ef1 | 115 | |
53677ef1 | 116 | #define DOC_ChipID_Doc2k 0x20 |
cfa460ad | 117 | #define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */ |
53677ef1 | 118 | #define DOC_ChipID_DocMil 0x30 |
cfa460ad WJ |
119 | #define DOC_ChipID_DocMilPlus32 0x40 |
120 | #define DOC_ChipID_DocMilPlus16 0x41 | |
53677ef1 WD |
121 | |
122 | #define CDSN_CTRL_FR_B 0x80 | |
cfa460ad WJ |
123 | #define CDSN_CTRL_FR_B0 0x40 |
124 | #define CDSN_CTRL_FR_B1 0x80 | |
125 | ||
53677ef1 WD |
126 | #define CDSN_CTRL_ECC_IO 0x20 |
127 | #define CDSN_CTRL_FLASH_IO 0x10 | |
128 | #define CDSN_CTRL_WP 0x08 | |
129 | #define CDSN_CTRL_ALE 0x04 | |
130 | #define CDSN_CTRL_CLE 0x02 | |
131 | #define CDSN_CTRL_CE 0x01 | |
132 | ||
133 | #define DOC_ECC_RESET 0 | |
134 | #define DOC_ECC_ERROR 0x80 | |
135 | #define DOC_ECC_RW 0x20 | |
136 | #define DOC_ECC__EN 0x08 | |
137 | #define DOC_TOGGLE_BIT 0x04 | |
138 | #define DOC_ECC_RESV 0x02 | |
012771d8 WD |
139 | #define DOC_ECC_IGNORE 0x01 |
140 | ||
cfa460ad WJ |
141 | #define DOC_FLASH_CE 0x80 |
142 | #define DOC_FLASH_WP 0x40 | |
143 | #define DOC_FLASH_BANK 0x02 | |
144 | ||
012771d8 WD |
145 | /* We have to also set the reserved bit 1 for enable */ |
146 | #define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) | |
147 | #define DOC_ECC_DIS (DOC_ECC_RESV) | |
148 | ||
cfa460ad WJ |
149 | struct Nand { |
150 | char floor, chip; | |
151 | unsigned long curadr; | |
152 | unsigned char curmode; | |
153 | /* Also some erase/write/pipeline info when we get that far */ | |
154 | }; | |
155 | ||
012771d8 WD |
156 | #define MAX_FLOORS 4 |
157 | #define MAX_CHIPS 4 | |
158 | ||
cfa460ad | 159 | #define MAX_FLOORS_MIL 1 |
012771d8 WD |
160 | #define MAX_CHIPS_MIL 1 |
161 | ||
cfa460ad WJ |
162 | #define MAX_FLOORS_MPLUS 2 |
163 | #define MAX_CHIPS_MPLUS 1 | |
164 | ||
012771d8 WD |
165 | #define ADDR_COLUMN 1 |
166 | #define ADDR_PAGE 2 | |
167 | #define ADDR_COLUMN_PAGE 3 | |
168 | ||
169 | struct DiskOnChip { | |
170 | unsigned long physadr; | |
cfa460ad | 171 | void __iomem *virtadr; |
012771d8 | 172 | unsigned long totlen; |
cfa460ad | 173 | unsigned char ChipID; /* Type of DiskOnChip */ |
012771d8 WD |
174 | int ioreg; |
175 | ||
012771d8 WD |
176 | unsigned long mfr; /* Flash IDs - only one type of flash per device */ |
177 | unsigned long id; | |
178 | int chipshift; | |
179 | char page256; | |
180 | char pageadrlen; | |
cfa460ad | 181 | char interleave; /* Internal interleaving - Millennium Plus style */ |
012771d8 WD |
182 | unsigned long erasesize; |
183 | ||
184 | int curfloor; | |
185 | int curchip; | |
186 | ||
187 | int numchips; | |
188 | struct Nand *chips; | |
cfa460ad WJ |
189 | struct mtd_info *nextdoc; |
190 | /* XXX U-BOOT XXX */ | |
191 | #if 0 | |
192 | struct mutex lock; | |
193 | #endif | |
012771d8 WD |
194 | }; |
195 | ||
012771d8 WD |
196 | int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); |
197 | ||
cfa460ad WJ |
198 | /* XXX U-BOOT XXX */ |
199 | #if 1 | |
2fc000d7 MB |
200 | /* |
201 | * NAND Flash Manufacturer ID Codes | |
202 | */ | |
cfa460ad WJ |
203 | #define NAND_MFR_TOSHIBA 0x98 |
204 | #define NAND_MFR_SAMSUNG 0xec | |
205 | #endif | |
2fc000d7 | 206 | |
012771d8 | 207 | #endif /* __MTD_DOC2000_H__ */ |