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mmc: remove the unnecessary define and fix the wrong bit control
[people/ms/u-boot.git] / include / miiphy.h
CommitLineData
46263f2d 1/*
1b387ef5 2 * SPDX-License-Identifier: GPL-2.0 IBM-pibs
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3 *
4 * Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
5 */
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6/*----------------------------------------------------------------------------+
7|
65bd0e28 8| File Name: miiphy.h
214ec6bb 9|
65bd0e28 10| Function: Include file defining PHY registers.
214ec6bb 11|
65bd0e28 12| Author: Mark Wisner
214ec6bb 13|
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14+----------------------------------------------------------------------------*/
15#ifndef _miiphy_h_
16#define _miiphy_h_
17
5f184715 18#include <common.h>
8ef583a0 19#include <linux/mii.h>
5f184715 20#include <linux/list.h>
63ff004c 21#include <net.h>
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22#include <phy.h>
23
24struct legacy_mii_dev {
25 int (*read)(const char *devname, unsigned char addr,
f915c931 26 unsigned char reg, unsigned short *value);
5f184715 27 int (*write)(const char *devname, unsigned char addr,
f915c931 28 unsigned char reg, unsigned short value);
5f184715 29};
214ec6bb 30
f915c931 31int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
298035df 32 unsigned short *value);
f915c931 33int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
298035df 34 unsigned short value);
16a53238 35int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
298035df 36 unsigned char *model, unsigned char *rev);
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37int miiphy_reset(const char *devname, unsigned char addr);
38int miiphy_speed(const char *devname, unsigned char addr);
39int miiphy_duplex(const char *devname, unsigned char addr);
40int miiphy_is_1000base_x(const char *devname, unsigned char addr);
6d0f6bcf 41#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
16a53238 42int miiphy_link(const char *devname, unsigned char addr);
fc3e2165 43#endif
214ec6bb 44
16a53238 45void miiphy_init(void);
d9785c14 46
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47void miiphy_register(const char *devname,
48 int (*read)(const char *devname, unsigned char addr,
f915c931 49 unsigned char reg, unsigned short *value),
16a53238 50 int (*write)(const char *devname, unsigned char addr,
f915c931 51 unsigned char reg, unsigned short value));
63ff004c 52
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53int miiphy_set_current_dev(const char *devname);
54const char *miiphy_get_current_dev(void);
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55struct mii_dev *mdio_get_current_dev(void);
56struct mii_dev *miiphy_get_dev_by_name(const char *devname);
57struct phy_device *mdio_phydev_for_ethname(const char *devname);
63ff004c 58
16a53238 59void miiphy_listdev(void);
63ff004c 60
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61struct mii_dev *mdio_alloc(void);
62int mdio_register(struct mii_dev *bus);
63void mdio_list_devices(void);
64
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65#ifdef CONFIG_BITBANGMII
66
67#define BB_MII_DEVNAME "bb_miiphy"
68
69struct bb_miiphy_bus {
f6add132 70 char name[16];
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71 int (*init)(struct bb_miiphy_bus *bus);
72 int (*mdio_active)(struct bb_miiphy_bus *bus);
73 int (*mdio_tristate)(struct bb_miiphy_bus *bus);
74 int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
75 int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
76 int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
77 int (*delay)(struct bb_miiphy_bus *bus);
78#ifdef CONFIG_BITBANGMII_MULTI
79 void *priv;
80#endif
81};
82
83extern struct bb_miiphy_bus bb_miiphy_buses[];
84extern int bb_miiphy_buses_num;
63ff004c 85
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86void bb_miiphy_init(void);
87int bb_miiphy_read(const char *devname, unsigned char addr,
298035df 88 unsigned char reg, unsigned short *value);
16a53238 89int bb_miiphy_write(const char *devname, unsigned char addr,
298035df 90 unsigned char reg, unsigned short value);
4ba31ab3 91#endif
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92
93/* phy seed setup */
65bd0e28 94#define AUTO 99
298035df 95#define _1000BASET 1000
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96#define _100BASET 100
97#define _10BASET 10
98#define HALF 22
99#define FULL 44
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100
101/* phy register offsets */
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102#define MII_MIPSCR 0x11
103
104/* MII_LPA */
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105#define PHY_ANLPAR_PSB_802_3 0x0001
106#define PHY_ANLPAR_PSB_802_9 0x0002
107
8ef583a0 108/* MII_CTRL1000 masks */
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109#define PHY_1000BTCR_1000FD 0x0200
110#define PHY_1000BTCR_1000HD 0x0100
111
8ef583a0 112/* MII_STAT1000 masks */
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113#define PHY_1000BTSR_MSCF 0x8000
114#define PHY_1000BTSR_MSCR 0x4000
115#define PHY_1000BTSR_LRS 0x2000
116#define PHY_1000BTSR_RRS 0x1000
117#define PHY_1000BTSR_1000FD 0x0800
118#define PHY_1000BTSR_1000HD 0x0400
855a496f 119
71bc6e64 120/* phy EXSR */
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121#define ESTATUS_1000XF 0x8000
122#define ESTATUS_1000XH 0x4000
71bc6e64 123
214ec6bb 124#endif