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46263f2d 1/*
1b387ef5 2 * SPDX-License-Identifier: GPL-2.0 IBM-pibs
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3 *
4 * Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
5 */
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6/*----------------------------------------------------------------------------+
7|
65bd0e28 8| File Name: miiphy.h
214ec6bb 9|
65bd0e28 10| Function: Include file defining PHY registers.
214ec6bb 11|
65bd0e28 12| Author: Mark Wisner
214ec6bb 13|
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14+----------------------------------------------------------------------------*/
15#ifndef _miiphy_h_
16#define _miiphy_h_
17
5f184715 18#include <common.h>
8ef583a0 19#include <linux/mii.h>
5f184715 20#include <linux/list.h>
63ff004c 21#include <net.h>
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22#include <phy.h>
23
f915c931 24int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
298035df 25 unsigned short *value);
f915c931 26int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
298035df 27 unsigned short value);
16a53238 28int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
298035df 29 unsigned char *model, unsigned char *rev);
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30int miiphy_reset(const char *devname, unsigned char addr);
31int miiphy_speed(const char *devname, unsigned char addr);
32int miiphy_duplex(const char *devname, unsigned char addr);
33int miiphy_is_1000base_x(const char *devname, unsigned char addr);
6d0f6bcf 34#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
16a53238 35int miiphy_link(const char *devname, unsigned char addr);
fc3e2165 36#endif
214ec6bb 37
16a53238 38void miiphy_init(void);
d9785c14 39
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40int miiphy_set_current_dev(const char *devname);
41const char *miiphy_get_current_dev(void);
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42struct mii_dev *mdio_get_current_dev(void);
43struct mii_dev *miiphy_get_dev_by_name(const char *devname);
44struct phy_device *mdio_phydev_for_ethname(const char *devname);
63ff004c 45
16a53238 46void miiphy_listdev(void);
63ff004c 47
5f184715 48struct mii_dev *mdio_alloc(void);
cb6baca7 49void mdio_free(struct mii_dev *bus);
5f184715 50int mdio_register(struct mii_dev *bus);
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51
52/**
53 * mdio_register_seq - Register mdio bus with sequence number
54 * @bus: mii device structure
55 * @seq: sequence number
56 *
57 * Return: 0 if success, negative value if error
58 */
59int mdio_register_seq(struct mii_dev *bus, int seq);
cb6baca7 60int mdio_unregister(struct mii_dev *bus);
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61void mdio_list_devices(void);
62
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63#ifdef CONFIG_BITBANGMII
64
65#define BB_MII_DEVNAME "bb_miiphy"
66
67struct bb_miiphy_bus {
f6add132 68 char name[16];
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69 int (*init)(struct bb_miiphy_bus *bus);
70 int (*mdio_active)(struct bb_miiphy_bus *bus);
71 int (*mdio_tristate)(struct bb_miiphy_bus *bus);
72 int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
73 int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
74 int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
75 int (*delay)(struct bb_miiphy_bus *bus);
76#ifdef CONFIG_BITBANGMII_MULTI
77 void *priv;
78#endif
79};
80
81extern struct bb_miiphy_bus bb_miiphy_buses[];
82extern int bb_miiphy_buses_num;
63ff004c 83
16a53238 84void bb_miiphy_init(void);
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85int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg);
86int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
87 u16 value);
4ba31ab3 88#endif
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89
90/* phy seed setup */
65bd0e28 91#define AUTO 99
298035df 92#define _1000BASET 1000
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93#define _100BASET 100
94#define _10BASET 10
95#define HALF 22
96#define FULL 44
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97
98/* phy register offsets */
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99#define MII_MIPSCR 0x11
100
101/* MII_LPA */
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102#define PHY_ANLPAR_PSB_802_3 0x0001
103#define PHY_ANLPAR_PSB_802_9 0x0002
104
8ef583a0 105/* MII_CTRL1000 masks */
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106#define PHY_1000BTCR_1000FD 0x0200
107#define PHY_1000BTCR_1000HD 0x0100
108
8ef583a0 109/* MII_STAT1000 masks */
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110#define PHY_1000BTSR_MSCF 0x8000
111#define PHY_1000BTSR_MSCR 0x4000
112#define PHY_1000BTSR_LRS 0x2000
113#define PHY_1000BTSR_RRS 0x1000
114#define PHY_1000BTSR_1000FD 0x0800
115#define PHY_1000BTSR_1000HD 0x0400
855a496f 116
71bc6e64 117/* phy EXSR */
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118#define ESTATUS_1000XF 0x8000
119#define ESTATUS_1000XH 0x4000
71bc6e64 120
214ec6bb 121#endif