]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/ns9750_eth.h
NAND: add support for reading ONFI page table
[people/ms/u-boot.git] / include / ns9750_eth.h
CommitLineData
80885a9d
WD
1/***********************************************************************
2 *
3 * Copyright (C) 2004 by FS Forth-Systeme GmbH.
4 * All rights reserved.
5 *
6 * $Id: ns9750_eth.h,v 1.2 2004/02/24 13:25:39 mpietrek Exp $
7 * @Author: Markus Pietrek
8 * @References: [1] NS9750 Hardware Reference, December 2003
9 * [2] Intel LXT971 Datasheet #249414 Rev. 02
10 * [3] NS7520 Linux Ethernet Driver
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 *
27 ***********************************************************************/
28
29#ifndef FS_NS9750_ETH_H
30#define FS_NS9750_ETH_H
31
32#ifdef CONFIG_DRIVER_NS9750_ETHERNET
33
fec61431 34#include <miiphy.h>
429168ea
WD
35#include "lxt971a.h"
36
53677ef1 37#define NS9750_ETH_MODULE_BASE (0xA0600000)
80885a9d
WD
38
39#define get_eth_reg_addr(c) \
40 ((volatile unsigned int*) ( NS9750_ETH_MODULE_BASE+(unsigned int) (c)))
41
53677ef1
WD
42#define NS9750_ETH_EGCR1 (0x0000)
43#define NS9750_ETH_EGCR2 (0x0004)
44#define NS9750_ETH_EGSR (0x0008)
45#define NS9750_ETH_FIFORX (0x000C)
46#define NS9750_ETH_FIFOTX (0x0010)
47#define NS9750_ETH_FIFOTXS (0x0014)
48#define NS9750_ETH_ETSR (0x0018)
49#define NS9750_ETH_ERSR (0x001C)
80885a9d
WD
50#define NS9750_ETH_MAC1 (0x0400)
51#define NS9750_ETH_MAC2 (0x0404)
52#define NS9750_ETH_IPGT (0x0408)
53#define NS9750_ETH_IPGR (0x040C)
54#define NS9750_ETH_CLRT (0x0410)
55#define NS9750_ETH_MAXF (0x0414)
56#define NS9750_ETH_SUPP (0x0418)
57#define NS9750_ETH_TEST (0x041C)
58#define NS9750_ETH_MCFG (0x0420)
59#define NS9750_ETH_MCMD (0x0424)
60#define NS9750_ETH_MADR (0x0428)
61#define NS9750_ETH_MWTD (0x042C)
62#define NS9750_ETH_MRDD (0x0430)
63#define NS9750_ETH_MIND (0x0434)
64#define NS9750_ETH_SA1 (0x0440)
65#define NS9750_ETH_SA2 (0x0444)
66#define NS9750_ETH_SA3 (0x0448)
67#define NS9750_ETH_SAFR (0x0500)
53677ef1
WD
68#define NS9750_ETH_HT1 (0x0504)
69#define NS9750_ETH_HT2 (0x0508)
70#define NS9750_ETH_STAT_BASE (0x0680)
80885a9d
WD
71#define NS9750_ETH_RXAPTR (0x0A00)
72#define NS9750_ETH_RXBPTR (0x0A04)
73#define NS9750_ETH_RXCPTR (0x0A08)
74#define NS9750_ETH_RXDPTR (0x0A0C)
75#define NS9750_ETH_EINTR (0x0A10)
76#define NS9750_ETH_EINTREN (0x0A14)
77#define NS9750_ETH_TXPTR (0x0A18)
78#define NS9750_ETH_TXRPTR (0x0A1C)
79#define NS9750_ETH_TXERBD (0x0A20)
80#define NS9750_ETH_TXSPTR (0x0A24)
81#define NS9750_ETH_RXAOFF (0x0A28)
82#define NS9750_ETH_RXBOFF (0x0A2C)
83#define NS9750_ETH_RXCOFF (0x0A30)
84#define NS9750_ETH_RXDOFF (0x0A34)
85#define NS9750_ETH_TXOFF (0x0A38)
86#define NS9750_ETH_RXFREE (0x0A3C)
87#define NS9750_ETH_TXBD (0x1000)
88
89/* register bit fields */
90
53677ef1
WD
91#define NS9750_ETH_EGCR1_ERX (0x80000000)
92#define NS9750_ETH_EGCR1_ERXDMA (0x40000000)
93#define NS9750_ETH_EGCR1_ERXSHT (0x10000000)
94#define NS9750_ETH_EGCR1_ERXSIZ (0x08000000)
95#define NS9750_ETH_EGCR1_ETXSIZ (0x04000000)
80885a9d 96#define NS9750_ETH_EGCR1_ETXDIAG (0x02000000)
53677ef1
WD
97#define NS9750_ETH_EGCR1_ERXBAD (0x01000000)
98#define NS9750_ETH_EGCR1_ETX (0x00800000)
99#define NS9750_ETH_EGCR1_ETXDMA (0x00400000)
100#define NS9750_ETH_EGCR1_ETXWM (0x00200000)
101#define NS9750_ETH_EGCR1_ERXADV (0x00100000)
80885a9d 102#define NS9750_ETH_EGCR1_ERXINIT (0x00080000)
53677ef1
WD
103#define NS9750_ETH_EGCR1_PHY_MODE_MA (0x0000C000)
104#define NS9750_ETH_EGCR1_PHY_MODE_MII (0x00008000)
105#define NS9750_ETH_EGCR1_PHY_MODE_RMII (0x00004000)
106#define NS9750_ETH_EGCR1_RXCINV (0x00001000)
107#define NS9750_ETH_EGCR1_TXCINV (0x00000800)
80885a9d 108#define NS9750_ETH_EGCR1_RXALIGN (0x00000400)
53677ef1
WD
109#define NS9750_ETH_EGCR1_MAC_HRST (0x00000200)
110#define NS9750_ETH_EGCR1_ITXA (0x00000100)
80885a9d
WD
111
112#define NS9750_ETH_EGCR2_TPTV_MA (0xFFFF0000)
113#define NS9750_ETH_EGCR2_TPCF (0x00000040)
114#define NS9750_ETH_EGCR2_THPDF (0x00000020)
115#define NS9750_ETH_EGCR2_TCLER (0x00000008)
116#define NS9750_ETH_EGCR2_AUTOZ (0x00000004)
117#define NS9750_ETH_EGCR2_CLRCNT (0x00000002)
118#define NS9750_ETH_EGCR2_STEN (0x00000001)
119
53677ef1
WD
120#define NS9750_ETH_EGSR_RXINIT (0x00100000)
121#define NS9750_ETH_EGSR_TXFIFONF (0x00080000)
122#define NS9750_ETH_EGSR_TXFIFOH (0x00040000)
123#define NS9750_ETH_EGSR_TXFIFOE (0x00010000)
80885a9d
WD
124
125#define NS9750_ETH_FIFOTXS_ALL (0x00000055)
126#define NS9750_ETH_FIFOTXS_3 (0x000000d5)
127#define NS9750_ETH_FIFOTXS_2 (0x00000035)
128#define NS9750_ETH_FIFOTXS_1 (0x0000000D)
129#define NS9750_ETH_FIFOTXS_0 (0x00000003)
130
53677ef1
WD
131#define NS9750_ETH_ETSR_TXOK (0x00008000)
132#define NS9750_ETH_ETSR_TXBR (0x00004000)
133#define NS9750_ETH_ETSR_TXMC (0x00002000)
134#define NS9750_ETH_ETSR_TXAL (0x00001000)
135#define NS9750_ETH_ETSR_TXAED (0x00000800)
136#define NS9750_ETH_ETSR_TXAEC (0x00000400)
137#define NS9750_ETH_ETSR_TXAUR (0x00000200)
138#define NS9750_ETH_ETSR_TXAJ (0x00000100)
139#define NS9750_ETH_ETSR_TXDEF (0x00000040)
140#define NS9750_ETH_ETSR_TXCRC (0x00000020)
141#define NS9750_ETH_ETSR_TXCOLC (0x0000000F)
80885a9d
WD
142
143#define NS9750_ETH_ERSR_RXSIZE_MA (0x0FFF0000)
53677ef1
WD
144#define NS9750_ETH_ERSR_RXCE (0x00008000)
145#define NS9750_ETH_ERSR_RXDV (0x00004000)
146#define NS9750_ETH_ERSR_RXOK (0x00002000)
147#define NS9750_ETH_ERSR_RXBR (0x00001000)
148#define NS9750_ETH_ERSR_RXMC (0x00000800)
149#define NS9750_ETH_ERSR_RXCRC (0x00000400)
150#define NS9750_ETH_ERSR_RXDR (0x00000200)
151#define NS9750_ETH_ERSR_RXCV (0x00000100)
152#define NS9750_ETH_ERSR_RXSHT (0x00000040)
153
154#define NS9750_ETH_MAC1_SRST (0x00008000)
155#define NS9750_ETH_MAC1_SIMMRST (0x00004000)
156#define NS9750_ETH_MAC1_RPEMCSR (0x00000800)
157#define NS9750_ETH_MAC1_RPERFUN (0x00000400)
158#define NS9750_ETH_MAC1_RPEMCST (0x00000200)
159#define NS9750_ETH_MAC1_RPETFUN (0x00000100)
160#define NS9750_ETH_MAC1_LOOPBK (0x00000010)
161#define NS9750_ETH_MAC1_TXFLOW (0x00000008)
162#define NS9750_ETH_MAC1_RXFLOW (0x00000004)
163#define NS9750_ETH_MAC1_PALLRX (0x00000002)
164#define NS9750_ETH_MAC1_RXEN (0x00000001)
165
166#define NS9750_ETH_MAC2_EDEFER (0x00004000)
167#define NS9750_ETH_MAC2_BACKP (0x00002000)
168#define NS9750_ETH_MAC2_NOBO (0x00001000)
169#define NS9750_ETH_MAC2_LONGP (0x00000200)
170#define NS9750_ETH_MAC2_PUREP (0x00000100)
171#define NS9750_ETH_MAC2_AUTOP (0x00000080)
172#define NS9750_ETH_MAC2_VLANP (0x00000040)
173#define NS9750_ETH_MAC2_PADEN (0x00000020)
174#define NS9750_ETH_MAC2_CRCEN (0x00000010)
175#define NS9750_ETH_MAC2_DELCRC (0x00000008)
176#define NS9750_ETH_MAC2_HUGE (0x00000004)
177#define NS9750_ETH_MAC2_FLENC (0x00000002)
178#define NS9750_ETH_MAC2_FULLD (0x00000001)
179
180#define NS9750_ETH_IPGT_MA (0x0000007F)
181
182#define NS9750_ETH_IPGR_IPGR1 (0x00007F00)
183#define NS9750_ETH_IPGR_IPGR2 (0x0000007F)
184
185#define NS9750_ETH_CLRT_CWIN (0x00003F00)
186#define NS9750_ETH_CLRT_RETX (0x0000000F)
187
188#define NS9750_ETH_MAXF_MAXF (0x0000FFFF)
189
190#define NS9750_ETH_SUPP_RPERMII (0x00008000)
191#define NS9750_ETH_SUPP_SPEED (0x00000080)
192
193#define NS9750_ETH_TEST_TBACK (0x00000004)
194#define NS9750_ETH_TEST_TPAUSE (0x00000002)
195#define NS9750_ETH_TEST_SPQ (0x00000001)
196
197#define NS9750_ETH_MCFG_RMIIM (0x00008000)
198#define NS9750_ETH_MCFG_CLKS_MA (0x0000001C)
199#define NS9750_ETH_MCFG_CLKS_4 (0x00000004)
200#define NS9750_ETH_MCFG_CLKS_6 (0x00000008)
201#define NS9750_ETH_MCFG_CLKS_8 (0x0000000C)
202#define NS9750_ETH_MCFG_CLKS_10 (0x00000010)
203#define NS9750_ETH_MCFG_CLKS_20 (0x00000014)
204#define NS9750_ETH_MCFG_CLKS_30 (0x00000018)
205#define NS9750_ETH_MCFG_CLKS_40 (0x0000001C)
206#define NS9750_ETH_MCFG_SPRE (0x00000002)
207#define NS9750_ETH_MCFG_SCANI (0x00000001)
208
209#define NS9750_ETH_MCMD_SCAN (0x00000002)
210#define NS9750_ETH_MCMD_READ (0x00000001)
211
212#define NS9750_ETH_MADR_DADR_MA (0x00001F00)
213#define NS9750_ETH_MADR_RADR_MA (0x0000001F)
214
215#define NS9750_ETH_MWTD_MA (0x0000FFFF)
216
217#define NS9750_ETH_MRRD_MA (0x0000FFFF)
80885a9d
WD
218
219#define NS9750_ETH_MIND_MIILF (0x00000008)
220#define NS9750_ETH_MIND_NVALID (0x00000004)
53677ef1
WD
221#define NS9750_ETH_MIND_SCAN (0x00000002)
222#define NS9750_ETH_MIND_BUSY (0x00000001)
80885a9d 223
53677ef1
WD
224#define NS9750_ETH_SA1_OCTET1_MA (0x0000FF00)
225#define NS9750_ETH_SA1_OCTET2_MA (0x000000FF)
80885a9d 226
53677ef1
WD
227#define NS9750_ETH_SA2_OCTET3_MA (0x0000FF00)
228#define NS9750_ETH_SA2_OCTET4_MA (0x000000FF)
80885a9d 229
53677ef1
WD
230#define NS9750_ETH_SA3_OCTET5_MA (0x0000FF00)
231#define NS9750_ETH_SA3_OCTET6_MA (0x000000FF)
80885a9d 232
53677ef1
WD
233#define NS9750_ETH_SAFR_PRO (0x00000008)
234#define NS9750_ETH_SAFR_PRM (0x00000004)
235#define NS9750_ETH_SAFR_PRA (0x00000002)
236#define NS9750_ETH_SAFR_BROAD (0x00000001)
80885a9d 237
53677ef1 238#define NS9750_ETH_HT1_MA (0x0000FFFF)
80885a9d 239
53677ef1 240#define NS9750_ETH_HT2_MA (0x0000FFFF)
80885a9d
WD
241
242/* also valid for EINTREN */
243#define NS9750_ETH_EINTR_RXOVL_DATA (0x02000000)
244#define NS9750_ETH_EINTR_RXOVL_STAT (0x01000000)
245#define NS9750_ETH_EINTR_RXBUFC (0x00800000)
246#define NS9750_ETH_EINTR_RXDONEA (0x00400000)
247#define NS9750_ETH_EINTR_RXDONEB (0x00200000)
248#define NS9750_ETH_EINTR_RXDONEC (0x00100000)
249#define NS9750_ETH_EINTR_RXDONED (0x00080000)
250#define NS9750_ETH_EINTR_RXNOBUF (0x00040000)
251#define NS9750_ETH_EINTR_RXBUFFUL (0x00020000)
252#define NS9750_ETH_EINTR_RXBR (0x00010000)
253#define NS9750_ETH_EINTR_STOVFL (0x00000040)
254#define NS9750_ETH_EINTR_TXPAUSE (0x00000020)
255#define NS9750_ETH_EINTR_TXBUFC (0x00000010)
256#define NS9750_ETH_EINTR_TXBUFNR (0x00000008)
257#define NS9750_ETH_EINTR_TXDONE (0x00000004)
53677ef1 258#define NS9750_ETH_EINTR_TXERR (0x00000002)
80885a9d
WD
259#define NS9750_ETH_EINTR_TXIDLE (0x00000001)
260#define NS9750_ETH_EINTR_RX_MA \
261 (NS9750_ETH_EINTR_RXOVL_DATA | \
262 NS9750_ETH_EINTR_RXOVL_STAT | \
263 NS9750_ETH_EINTR_RXBUFC | \
264 NS9750_ETH_EINTR_RXDONEA | \
265 NS9750_ETH_EINTR_RXDONEB | \
266 NS9750_ETH_EINTR_RXDONEC | \
267 NS9750_ETH_EINTR_RXDONED | \
268 NS9750_ETH_EINTR_RXNOBUF | \
269 NS9750_ETH_EINTR_RXBUFFUL | \
270 NS9750_ETH_EINTR_RXBR )
271#define NS9750_ETH_EINTR_TX_MA \
272 (NS9750_ETH_EINTR_TXPAUSE | \
273 NS9750_ETH_EINTR_TXBUFC | \
274 NS9750_ETH_EINTR_TXBUFNR | \
275 NS9750_ETH_EINTR_TXDONE | \
276 NS9750_ETH_EINTR_TXERR | \
277 NS9750_ETH_EINTR_TXIDLE)
278
279/* for TXPTR, TXRPTR, TXERBD and TXSPTR */
280#define NS9750_ETH_TXPTR_MA (0x000000FF)
281
282/* for RXAOFF, RXBOFF, RXCOFF and RXDOFF */
283#define NS9750_ETH_RXOFF_MA (0x000007FF)
284
285#define NS9750_ETH_TXOFF_MA (0x000003FF)
286
287#define NS9750_ETH_RXFREE_D (0x00000008)
288#define NS9750_ETH_RXFREE_C (0x00000004)
289#define NS9750_ETH_RXFREE_B (0x00000002)
290#define NS9750_ETH_RXFREE_A (0x00000001)
291
80885a9d 292#ifndef NS9750_ETH_PHY_ADDRESS
53677ef1 293# define NS9750_ETH_PHY_ADDRESS (0x0001) /* suitable for UNC20 */
80885a9d
WD
294#endif /* NETARM_ETH_PHY_ADDRESS */
295
296#endif /* CONFIG_DRIVER_NS9750_ETHERNET */
297
298#endif /* FS_NS9750_ETH_H */