[people/ms/u-boot.git] / include / palmas.h

/*
 * (C) Copyright 2012-2013
 * Texas Instruments, <www.ti.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
#ifndef PALMAS_H
#define PALMAS_H

#include <common.h>
#include <i2c.h>

/* I2C chip addresses, TW6035/37 */
#define TWL603X_CHIP_P1		0x48	/* Page 1 */
#define TWL603X_CHIP_P2		0x49	/* Page 2 */
#define TWL603X_CHIP_P3		0x4a	/* Page 3 */

/* TPS659038/39 */
#define TPS65903X_CHIP_P1	0x58	/* Page 1 */

/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */

/* LDO1 control/voltage */
#define LDO1_CTRL		0x50
#define LDO1_VOLTAGE		0x51

/* LDO9 control/voltage */
#define LDO9_CTRL		0x60
#define LDO9_VOLTAGE		0x61

/* LDOUSB control/voltage */
#define LDOUSB_CTRL		0x64
#define LDOUSB_VOLTAGE		0x65

/* Control of 32 kHz audio clock */
#define CLK32KGAUDIO_CTRL	0xd5

/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
#define SYSEN2_CTRL		0xd9

/*
 * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
 * and some other xxx_CTRL resources:
 */
#define LDO9_BYP_EN		(1 << 6)	/* LDO9 only! */
#define RSC_STAT_ON		(1 << 4)	/* RO status bit! */
#define RSC_MODE_SLEEP		(1 << 2)
#define RSC_MODE_ACTIVE		(1 << 0)

/* Some LDO voltage values */
#define LDO_VOLT_OFF		0
#define LDO_VOLT_1V8		0x13
#define LDO_VOLT_3V0		0x2b
#define LDO_VOLT_3V3		0x31
/* Request bypass, LDO9 only */
#define LDO9_BYPASS		0x3f

/* SMPS7_CTRL */
#define SMPS7_CTRL		0x30

/* SMPS9_CTRL */
#define SMPS9_CTRL		0x38
#define SMPS9_VOLTAGE		0x3b

/* Bit field definitions for SMPSx_CTRL */
#define SMPS_MODE_ACT_AUTO	1
#define SMPS_MODE_ACT_ECO	2
#define SMPS_MODE_ACT_FPWM	3
#define SMPS_MODE_SLP_AUTO	(1 << 2)
#define SMPS_MODE_SLP_ECO	(2 << 2)
#define SMPS_MODE_SLP_FPWM	(3 << 2)

/*
 * Some popular SMPS voltages, all with RANGE=1; note
 * that RANGE cannot be changed on the fly
 */
#define SMPS_VOLT_OFF		0
#define SMPS_VOLT_1V2		0x90
#define SMPS_VOLT_1V8		0xae
#define SMPS_VOLT_2V1		0xbd
#define SMPS_VOLT_3V0		0xea
#define SMPS_VOLT_3V3		0xf9

/* Backup Battery & VRTC Control */
#define BB_VRTC_CTRL		0xa8
/* Bit definitions for BB_VRTC_CTRL */
#define VRTC_EN_SLP		(1 << 6)
#define VRTC_EN_OFF		(1 << 5)
#define VRTC_PWEN		(1 << 4)
#define BB_LOW_ICHRG		(1 << 3)
#define BB_HIGH_ICHRG		(0 << 3)
#define BB_VSEL_3V0		(0 << 1)
#define BB_VSEL_2V5		(1 << 1)
#define BB_VSEL_3V15		(2 << 1)
#define BB_VSEL_VBAT		(3 << 1)
#define BB_CHRG_EN		(1 << 0)

/*
 * Functions to read and write from TPS659038/TWL6035/TWL6037
 * or other Palmas family of TI PMICs
 */
static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
{
	return i2c_write(chip_no, reg, 1, &val, 1);
}

static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
{
	return i2c_read(chip_no, reg, 1, val, 1);
}

void palmas_init_settings(void);
int palmas_mmc1_poweron_ldo(void);
int twl603x_mmc1_set_ldo9(u8 vsel);
int twl603x_audio_power(u8 on);
int twl603x_enable_bb_charge(u8 bb_fields);

#endif /* PALMAS_H */
Commit	Line	Data
21144298	1	/*
cb199102	2	* (C) Copyright 2012-2013
21144298 S	3	* Texas Instruments, <www.ti.com>
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
da2cc454 NM	23	#ifndef PALMAS_H
da2cc454 NM	24	#define PALMAS_H
21144298 S	25
	26	#include <common.h>
	27	#include <i2c.h>
	28
e9090fa4 LP	29	/* I2C chip addresses, TW6035/37 */
	30	#define TWL603X_CHIP_P1 0x48 /* Page 1 */
	31	#define TWL603X_CHIP_P2 0x49 /* Page 2 */
	32	#define TWL603X_CHIP_P3 0x4a /* Page 3 */
21144298	33
e9090fa4 LP	34	/* TPS659038/39 */
	35	#define TPS65903X_CHIP_P1 0x58 /* Page 1 */
	36
	37	/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
	38
	39	/* LDO1 control/voltage */
	40	#define LDO1_CTRL 0x50
	41	#define LDO1_VOLTAGE 0x51
	42
	43	/* LDO9 control/voltage */
21144298 S	44	#define LDO9_CTRL 0x60
	45	#define LDO9_VOLTAGE 0x61
	46
e9090fa4 LP	47	/* LDOUSB control/voltage */
	48	#define LDOUSB_CTRL 0x64
	49	#define LDOUSB_VOLTAGE 0x65
	50
	51	/* Control of 32 kHz audio clock */
	52	#define CLK32KGAUDIO_CTRL 0xd5
	53
	54	/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
	55	#define SYSEN2_CTRL 0xd9
	56
	57	/*
	58	* Bit field definitions for LDOx_CTRL, SYSENx_CTRL
	59	* and some other xxx_CTRL resources:
	60	*/
	61	#define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
	62	#define RSC_STAT_ON (1 << 4) /* RO status bit! */
	63	#define RSC_MODE_SLEEP (1 << 2)
	64	#define RSC_MODE_ACTIVE (1 << 0)
	65
	66	/* Some LDO voltage values */
	67	#define LDO_VOLT_OFF 0
	68	#define LDO_VOLT_1V8 0x13
	69	#define LDO_VOLT_3V0 0x2b
	70	#define LDO_VOLT_3V3 0x31
	71	/* Request bypass, LDO9 only */
	72	#define LDO9_BYPASS 0x3f
	73
	74	/* SMPS7_CTRL */
	75	#define SMPS7_CTRL 0x30
	76
	77	/* SMPS9_CTRL */
	78	#define SMPS9_CTRL 0x38
	79	#define SMPS9_VOLTAGE 0x3b
	80
	81	/* Bit field definitions for SMPSx_CTRL */
	82	#define SMPS_MODE_ACT_AUTO 1
	83	#define SMPS_MODE_ACT_ECO 2
	84	#define SMPS_MODE_ACT_FPWM 3
	85	#define SMPS_MODE_SLP_AUTO (1 << 2)
	86	#define SMPS_MODE_SLP_ECO (2 << 2)
	87	#define SMPS_MODE_SLP_FPWM (3 << 2)
	88
	89	/*
	90	* Some popular SMPS voltages, all with RANGE=1; note
	91	* that RANGE cannot be changed on the fly
	92	*/
	93	#define SMPS_VOLT_OFF 0
	94	#define SMPS_VOLT_1V2 0x90
	95	#define SMPS_VOLT_1V8 0xae
	96	#define SMPS_VOLT_2V1 0xbd
	97	#define SMPS_VOLT_3V0 0xea
	98	#define SMPS_VOLT_3V3 0xf9
	99
	100	/* Backup Battery & VRTC Control */
	101	#define BB_VRTC_CTRL 0xa8
	102	/* Bit definitions for BB_VRTC_CTRL */
	103	#define VRTC_EN_SLP (1 << 6)
	104	#define VRTC_EN_OFF (1 << 5)
	105	#define VRTC_PWEN (1 << 4)
	106	#define BB_LOW_ICHRG (1 << 3)
	107	#define BB_HIGH_ICHRG (0 << 3)
	108	#define BB_VSEL_3V0 (0 << 1)
	109	#define BB_VSEL_2V5 (1 << 1)
	110	#define BB_VSEL_3V15 (2 << 1)
111	#define BB_VSEL_VBAT (3 << 1)
112	#define BB_CHRG_EN (1 << 0)
21144298	113
ff2d57ea NM	114	/*
	115	* Functions to read and write from TPS659038/TWL6035/TWL6037
	116	* or other Palmas family of TI PMICs
	117	*/
	118	static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
	119	{
	120	return i2c_write(chip_no, reg, 1, &val, 1);
	121	}
	122
	123	static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
	124	{
	125	return i2c_read(chip_no, reg, 1, val, 1);
	126	}
	127
12733881	128	void palmas_init_settings(void);
384bcae0	129	int palmas_mmc1_poweron_ldo(void);
e9090fa4 LP	130	int twl603x_mmc1_set_ldo9(u8 vsel);
	131	int twl603x_audio_power(u8 on);
	132	int twl603x_enable_bb_charge(u8 bb_fields);
da2cc454 NM	133
da2cc454 NM	134	#endif /* PALMAS_H */