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7133d4c4 WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
800eb096 MZ |
5 | * (C) Copyright 2010 |
6 | * Michael Zaidman, Kodak, michael.zaidman@kodak.com | |
7 | * post_word_{load|store} cleanup. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
7133d4c4 WD |
10 | */ |
11 | #ifndef _POST_H | |
12 | #define _POST_H | |
13 | ||
14 | #ifndef __ASSEMBLY__ | |
15 | #include <common.h> | |
800eb096 MZ |
16 | #include <asm/io.h> |
17 | ||
18 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) | |
19 | ||
3e161ced | 20 | #ifndef CONFIG_POST_EXTERNAL_WORD_FUNCS |
800eb096 MZ |
21 | #ifdef CONFIG_SYS_POST_WORD_ADDR |
22 | #define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR | |
23 | #else | |
24 | ||
25 | #ifdef CONFIG_MPC5xxx | |
26 | #define _POST_WORD_ADDR (MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE) | |
27 | ||
28 | #elif defined(CONFIG_MPC512X) | |
29 | #define _POST_WORD_ADDR \ | |
30 | (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) | |
31 | ||
800eb096 MZ |
32 | #elif defined(CONFIG_MPC8260) |
33 | #include <asm/cpm_8260.h> | |
34 | #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) | |
35 | ||
36 | #elif defined(CONFIG_MPC8360) | |
38d67a4e | 37 | #include <linux/immap_qe.h> |
800eb096 MZ |
38 | #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) |
39 | ||
40 | #elif defined (CONFIG_MPC85xx) | |
8790ac03 | 41 | #include <asm/immap_85xx.h> |
9de0aa74 KG |
42 | #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \ |
43 | offsetof(ccsr_pic_t, tfrr)) | |
800eb096 | 44 | |
65f23519 PT |
45 | #elif defined (CONFIG_MPC86xx) |
46 | #include <asm/immap_86xx.h> | |
9de0aa74 KG |
47 | #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET + \ |
48 | offsetof(ccsr_pic_t, tfrr)) | |
65f23519 | 49 | |
800eb096 MZ |
50 | #elif defined (CONFIG_4xx) |
51 | #define _POST_WORD_ADDR \ | |
52 | (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) | |
7133d4c4 WD |
53 | #endif |
54 | ||
800eb096 MZ |
55 | #ifndef _POST_WORD_ADDR |
56 | #error "_POST_WORD_ADDR currently not implemented for this platform!" | |
57 | #endif | |
58 | #endif /* CONFIG_SYS_POST_WORD_ADDR */ | |
59 | ||
60 | static inline ulong post_word_load (void) | |
61 | { | |
62 | return in_le32((volatile void *)(_POST_WORD_ADDR)); | |
63 | } | |
64 | ||
65 | static inline void post_word_store (ulong value) | |
66 | { | |
67 | out_le32((volatile void *)(_POST_WORD_ADDR), value); | |
68 | } | |
3e161ced VL |
69 | |
70 | #else | |
71 | ||
72 | extern ulong post_word_load(void); | |
73 | extern void post_word_store(ulong value); | |
74 | ||
75 | #endif /* CONFIG_POST_EXTERNAL_WORD_FUNCS */ | |
800eb096 MZ |
76 | #endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */ |
77 | #endif /* __ASSEMBLY__ */ | |
78 | ||
7133d4c4 WD |
79 | #ifdef CONFIG_POST |
80 | ||
81 | #define POST_POWERON 0x01 /* test runs on power-on booting */ | |
8564acf9 WD |
82 | #define POST_NORMAL 0x02 /* test runs on normal booting */ |
83 | #define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */ | |
7133d4c4 WD |
84 | #define POST_POWERTEST 0x08 /* test runs after watchdog reset */ |
85 | ||
27b207fd WD |
86 | #define POST_COLDBOOT 0x80 /* first boot after power-on */ |
87 | ||
7133d4c4 WD |
88 | #define POST_ROM 0x0100 /* test runs in ROM */ |
89 | #define POST_RAM 0x0200 /* test runs in RAM */ | |
90 | #define POST_MANUAL 0x0400 /* test runs on diag command */ | |
91 | #define POST_REBOOT 0x0800 /* test may cause rebooting */ | |
800eb096 | 92 | #define POST_PREREL 0x1000 /* test runs before relocation */ |
7133d4c4 | 93 | |
b428f6a8 | 94 | #define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */ |
28a38506 | 95 | #define POST_STOP 0x4000 /* Interrupt POST sequence on fail */ |
b428f6a8 | 96 | |
7133d4c4 | 97 | #define POST_MEM (POST_RAM | POST_ROM) |
8564acf9 WD |
98 | #define POST_ALWAYS (POST_NORMAL | \ |
99 | POST_SLOWTEST | \ | |
100 | POST_MANUAL | \ | |
7133d4c4 WD |
101 | POST_POWERON ) |
102 | ||
b428f6a8 YT |
103 | #define POST_FAIL_SAVE 0x80 |
104 | ||
e070a56c MZ |
105 | #define POST_BEFORE 1 |
106 | #define POST_AFTER 0 | |
107 | #define POST_PASSED 1 | |
108 | #define POST_FAILED 0 | |
109 | ||
7133d4c4 WD |
110 | #ifndef __ASSEMBLY__ |
111 | ||
112 | struct post_test { | |
113 | char *name; | |
114 | char *cmd; | |
115 | char *desc; | |
116 | int flags; | |
117 | int (*test) (int flags); | |
4532cb69 WD |
118 | int (*init_f) (void); |
119 | void (*reloc) (void); | |
228f29ac | 120 | unsigned long testid; |
7133d4c4 | 121 | }; |
4532cb69 | 122 | int post_init_f (void); |
7133d4c4 WD |
123 | void post_bootmode_init (void); |
124 | int post_bootmode_get (unsigned int * last_test); | |
125 | void post_bootmode_clear (void); | |
228f29ac | 126 | void post_output_backlog ( void ); |
7133d4c4 WD |
127 | int post_run (char *name, int flags); |
128 | int post_info (char *name); | |
129 | int post_log (char *format, ...); | |
2e5167cc | 130 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
7133d4c4 | 131 | void post_reloc (void); |
521af04d | 132 | #endif |
4532cb69 | 133 | unsigned long post_time_ms (unsigned long base); |
7133d4c4 WD |
134 | |
135 | extern struct post_test post_list[]; | |
136 | extern unsigned int post_list_size; | |
27b207fd | 137 | extern int post_hotkeys_pressed(void); |
eaf5e65a | 138 | extern int memory_post_test(int flags); |
7133d4c4 | 139 | |
ce82ff05 YT |
140 | /* |
141 | * If GCC is configured to use a version of GAS that supports | |
142 | * the .gnu_attribute directive, it will use that directive to | |
143 | * record certain properties of the output code. | |
144 | * This feature is new to GCC 4.3.0. | |
145 | * .gnu_attribute is new to GAS 2.18. | |
146 | */ | |
147 | #if (__GNUC__ >= 4 && __GNUC_MINOR__ >= 3) | |
148 | /* Tag_GNU_Power_ABI_FP/soft-float */ | |
149 | #define GNU_FPOST_ATTR asm(".gnu_attribute 4, 2"); | |
150 | #else | |
151 | #define GNU_FPOST_ATTR | |
152 | #endif /* __GNUC__ */ | |
7133d4c4 WD |
153 | #endif /* __ASSEMBLY__ */ |
154 | ||
6d0f6bcf JCPV |
155 | #define CONFIG_SYS_POST_RTC 0x00000001 |
156 | #define CONFIG_SYS_POST_WATCHDOG 0x00000002 | |
157 | #define CONFIG_SYS_POST_MEMORY 0x00000004 | |
158 | #define CONFIG_SYS_POST_CPU 0x00000008 | |
159 | #define CONFIG_SYS_POST_I2C 0x00000010 | |
160 | #define CONFIG_SYS_POST_CACHE 0x00000020 | |
161 | #define CONFIG_SYS_POST_UART 0x00000040 | |
162 | #define CONFIG_SYS_POST_ETHER 0x00000080 | |
6d0f6bcf JCPV |
163 | #define CONFIG_SYS_POST_USB 0x00000200 |
164 | #define CONFIG_SYS_POST_SPR 0x00000400 | |
165 | #define CONFIG_SYS_POST_SYSMON 0x00000800 | |
166 | #define CONFIG_SYS_POST_DSP 0x00001000 | |
167 | #define CONFIG_SYS_POST_OCM 0x00002000 | |
168 | #define CONFIG_SYS_POST_FPU 0x00004000 | |
169 | #define CONFIG_SYS_POST_ECC 0x00008000 | |
170 | #define CONFIG_SYS_POST_BSPEC1 0x00010000 | |
171 | #define CONFIG_SYS_POST_BSPEC2 0x00020000 | |
172 | #define CONFIG_SYS_POST_BSPEC3 0x00040000 | |
173 | #define CONFIG_SYS_POST_BSPEC4 0x00080000 | |
174 | #define CONFIG_SYS_POST_BSPEC5 0x00100000 | |
175 | #define CONFIG_SYS_POST_CODEC 0x00200000 | |
29fd7ceb | 176 | #define CONFIG_SYS_POST_COPROC 0x00400000 |
f6f7395e | 177 | #define CONFIG_SYS_POST_FLASH 0x00800000 |
8d3fcb5e | 178 | #define CONFIG_SYS_POST_MEM_REGIONS 0x01000000 |
7133d4c4 WD |
179 | |
180 | #endif /* CONFIG_POST */ | |
181 | ||
182 | #endif /* _POST_H */ |