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e542b7f0 1/*
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2 * Copyright (C) 2014-2015 Samsung Electronics
3 * Przemyslaw Marczak <p.marczak@samsung.com>
4 *
c7336815 5 * Copyright (C) 2011-2012 Samsung Electronics
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6 * Lukasz Majewski <l.majewski@samsung.com>
7 *
1a459660 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CORE_PMIC_H_
12#define __CORE_PMIC_H_
13
c7336815 14#include <i2c.h>
f415a3ec 15#include <linux/list.h>
bd8479e8 16#include <power/power_chrg.h>
c7336815 17
bd8479e8 18enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
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19
20#ifdef CONFIG_POWER
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21enum { I2C_PMIC, I2C_NUM, };
22enum { PMIC_READ, PMIC_WRITE, };
86879d71 23enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
e542b7f0 24
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25enum {
26 PMIC_CHARGER_DISABLE,
27 PMIC_CHARGER_ENABLE,
28};
29
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30struct p_i2c {
31 unsigned char addr;
32 unsigned char *buf;
33 unsigned char tx_num;
34};
35
36struct p_spi {
37 unsigned int cs;
38 unsigned int mode;
39 unsigned int bitlen;
40 unsigned int clk;
41 unsigned int flags;
42 u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
43};
44
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45struct pmic;
46struct power_fg {
47 int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
48 int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
49};
50
51struct power_chrg {
52 int (*chrg_type) (struct pmic *p);
53 int (*chrg_bat_present) (struct pmic *p);
54 int (*chrg_state) (struct pmic *p, int state, int current);
55};
56
57struct power_battery {
58 struct battery *bat;
59 int (*battery_init) (struct pmic *bat, struct pmic *p1,
60 struct pmic *p2, struct pmic *p3);
61 int (*battery_charge) (struct pmic *bat);
62 /* Keep info about power devices involved with battery operation */
63 struct pmic *chrg, *fg, *muic;
64};
65
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66struct pmic {
67 const char *name;
68 unsigned char bus;
69 unsigned char interface;
86879d71 70 unsigned char sensor_byte_order;
c7336815 71 unsigned int number_of_regs;
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72 union hw {
73 struct p_i2c i2c;
74 struct p_spi spi;
75 } hw;
c7336815 76
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77 void (*low_power_mode) (void);
78 struct power_battery *pbat;
79 struct power_chrg *chrg;
80 struct power_fg *fg;
81
82 struct pmic *parent;
c7336815 83 struct list_head list;
e542b7f0 84};
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85#endif /* CONFIG_POWER */
86
87#ifdef CONFIG_DM_PMIC
88/**
89 * U-Boot PMIC Framework
90 * =====================
91 *
f415a3ec 92 * UCLASS_PMIC - This is designed to provide an I/O interface for PMIC devices.
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93 *
94 * For the multi-function PMIC devices, this can be used as parent I/O device
f415a3ec 95 * for each IC's interface. Then, each child uses its parent for read/write.
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96 *
97 * The driver model tree could look like this:
98 *
99 *_ root device
100 * |_ BUS 0 device (e.g. I2C0) - UCLASS_I2C/SPI/...
101 * | |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
102 * | |_ REGULATOR device (ldo/buck/... ops) - UCLASS_REGULATOR
103 * | |_ CHARGER device (charger ops) - UCLASS_CHARGER (in the future)
104 * | |_ MUIC device (microUSB connector ops) - UCLASS_MUIC (in the future)
105 * | |_ ...
106 * |
107 * |_ BUS 1 device (e.g. I2C1) - UCLASS_I2C/SPI/...
108 * |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
109 * |_ RTC device (rtc ops) - UCLASS_RTC (in the future)
110 *
111 * We can find two PMIC cases in boards design:
112 * - single I/O interface
113 * - multiple I/O interfaces
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114 * We bind a single PMIC device for each interface, to provide an I/O for
115 * its child devices. And each child usually implements a different function,
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116 * controlled by the same interface.
117 *
118 * The binding should be done automatically. If device tree nodes/subnodes are
119 * proper defined, then:
120 *
121 * |_ the ROOT driver will bind the device for I2C/SPI node:
122 * |_ the I2C/SPI driver should bind a device for pmic node:
123 * |_ the PMIC driver should bind devices for its childs:
124 * |_ regulator (child)
125 * |_ charger (child)
126 * |_ other (child)
127 *
128 * The same for other device nodes, for multi-interface PMIC.
129 *
130 * Note:
131 * Each PMIC interface driver should use a different compatible string.
132 *
f415a3ec 133 * If a PMIC child device driver needs access the PMIC-specific registers,
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134 * it need know only the register address and the access can be done through
135 * the parent pmic driver. Like in the example:
136 *
137 *_ root driver
138 * |_ dev: bus I2C0 - UCLASS_I2C
139 * | |_ dev: my_pmic (read/write) (is parent) - UCLASS_PMIC
140 * | |_ dev: my_regulator (set value/etc..) (is child) - UCLASS_REGULATOR
141 *
142 * To ensure such device relationship, the pmic device driver should also bind
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143 * all its child devices, like in the example below. It can be done by calling
144 * the 'pmic_bind_children()' - please refer to the function description, which
145 * can be found in this header file. This function, should be called inside the
146 * driver's bind() method.
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147 *
148 * For the example driver, please refer the MAX77686 driver:
149 * - 'drivers/power/pmic/max77686.c'
150 */
151
152/**
153 * struct dm_pmic_ops - PMIC device I/O interface
154 *
155 * Should be implemented by UCLASS_PMIC device drivers. The standard
156 * device operations provides the I/O interface for it's childs.
157 *
f415a3ec 158 * @reg_count: device's register count
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159 * @read: read 'len' bytes at "reg" and store it into the 'buffer'
160 * @write: write 'len' bytes from the 'buffer' to the register at 'reg' address
161 */
162struct dm_pmic_ops {
f415a3ec 163 int (*reg_count)(struct udevice *dev);
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164 int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
165 int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
166 int len);
167};
168
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169/**
170 * enum pmic_op_type - used for various pmic devices operation calls,
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171 * for reduce a number of lines with the same code for read/write or get/set.
172 *
173 * @PMIC_OP_GET - get operation
174 * @PMIC_OP_SET - set operation
175*/
176enum pmic_op_type {
177 PMIC_OP_GET,
178 PMIC_OP_SET,
179};
180
181/**
182 * struct pmic_child_info - basic device's child info for bind child nodes with
183 * the driver by the node name prefix and driver name. This is a helper struct
f415a3ec 184 * for function: pmic_bind_children().
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185 *
186 * @prefix - child node name prefix (or its name if is unique or single)
187 * @driver - driver name for the sub-node with prefix
188 */
189struct pmic_child_info {
190 const char *prefix;
191 const char *driver;
192};
193
194/* drivers/power/pmic-uclass.c */
195
196/**
f415a3ec 197 * pmic_bind_children() - bind drivers for given parent pmic, using child info
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198 * found in 'child_info' array.
199 *
200 * @pmic - pmic device - the parent of found child's
201 * @child_info - N-childs info array
202 * @return a positive number of childs, or 0 if no child found (error)
203 *
204 * Note: For N-childs the child_info array should have N+1 entries and the last
205 * entry prefix should be NULL - the same as for drivers compatible.
206 *
207 * For example, a single prefix info (N=1):
208 * static const struct pmic_child_info bind_info[] = {
209 * { .prefix = "ldo", .driver = "ldo_driver" },
210 * { },
211 * };
212 *
213 * This function is useful for regulator sub-nodes:
214 * my_regulator@0xa {
215 * reg = <0xa>;
216 * (pmic - bind automatically by compatible)
217 * compatible = "my_pmic";
218 * ...
f415a3ec 219 * (pmic's childs - bind by pmic_bind_children())
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220 * (nodes prefix: "ldo", driver: "my_regulator_ldo")
221 * ldo1 { ... };
222 * ldo2 { ... };
223 *
224 * (nodes prefix: "buck", driver: "my_regulator_buck")
225 * buck1 { ... };
226 * buck2 { ... };
227 * };
228 */
7a869e6c 229int pmic_bind_children(struct udevice *pmic, ofnode parent,
f415a3ec 230 const struct pmic_child_info *child_info);
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231
232/**
233 * pmic_get: get the pmic device using its name
234 *
235 * @name - device name
236 * @devp - returned pointer to the pmic device
237 * @return 0 on success or negative value of errno.
238 *
239 * The returned devp device can be used with pmic_read/write calls
240 */
241int pmic_get(const char *name, struct udevice **devp);
242
243/**
244 * pmic_reg_count: get the pmic register count
245 *
246 * The required pmic device can be obtained by 'pmic_get()'
247 *
248 * @dev - pointer to the UCLASS_PMIC device
249 * @return register count value on success or negative value of errno.
250 */
251int pmic_reg_count(struct udevice *dev);
252
253/**
254 * pmic_read/write: read/write to the UCLASS_PMIC device
255 *
256 * The required pmic device can be obtained by 'pmic_get()'
257 *
258 * @pmic - pointer to the UCLASS_PMIC device
259 * @reg - device register offset
260 * @buffer - pointer to read/write buffer
261 * @len - byte count for read/write
262 * @return 0 on success or negative value of errno.
263 */
264int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
265int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len);
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266
267/**
268 * pmic_reg_read() - read a PMIC register value
269 *
270 * @dev: PMIC device to read
271 * @reg: Register to read
272 * @return value read on success or negative value of errno.
273 */
274int pmic_reg_read(struct udevice *dev, uint reg);
275
276/**
277 * pmic_reg_write() - write a PMIC register value
278 *
279 * @dev: PMIC device to write
280 * @reg: Register to write
281 * @value: Value to write
282 * @return 0 on success or negative value of errno.
283 */
284int pmic_reg_write(struct udevice *dev, uint reg, uint value);
285
286/**
287 * pmic_clrsetbits() - clear and set bits in a PMIC register
288 *
289 * This reads a register, optionally clears some bits, optionally sets some
290 * bits, then writes the register.
291 *
292 * @dev: PMIC device to update
293 * @reg: Register to update
294 * @clr: Bit mask to clear (set those bits that you want cleared)
295 * @set: Bit mask to set (set those bits that you want set)
296 * @return 0 on success or negative value of errno.
297 */
298int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
299
4d9057e8 300#endif /* CONFIG_DM_PMIC */
e542b7f0 301
4d9057e8 302#ifdef CONFIG_POWER
c7336815 303int pmic_init(unsigned char bus);
5c44dd6b 304int power_init_board(void);
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305int pmic_dialog_init(unsigned char bus);
306int check_reg(struct pmic *p, u32 reg);
307struct pmic *pmic_alloc(void);
308struct pmic *pmic_get(const char *s);
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309int pmic_probe(struct pmic *p);
310int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
311int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
312int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
4d9057e8 313#endif
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314
315#define pmic_i2c_addr (p->hw.i2c.addr)
316#define pmic_i2c_tx_num (p->hw.i2c.tx_num)
317
318#define pmic_spi_bitlen (p->hw.spi.bitlen)
319#define pmic_spi_flags (p->hw.spi.flags)
320
321#endif /* __CORE_PMIC_H_ */