projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c571d682 SA |
1 | /* |
| 2 | * Copyright (C) 2016 Toradex AG | |
| 3 | * Stefan Agner <stefan.agner@toradex.com> | |
| 4 | * | |
| 5 | * SPDX-License-Identifier: GPL-2.0+ | |
| 6 | */ | |
| 7 | #ifndef __RN5T567_PMIC_H_ | |
| 8 | #define __RN5T567_PMIC_H_ | |
| 9 | ||
| 10 | /* RN5T567 registers */ | |
| 11 | enum { | |
| 12 | RN5T567_LSIVER = 0x00, | |
| 13 | RN5T567_OTPVER = 0x01, | |
| 14 | RN5T567_IODAC = 0x02, | |
| 15 | RN5T567_VINDAC = 0x03, | |
| 16 | RN5T567_OUT32KEN = 0x05, | |
| 17 | ||
| 18 | RN5T567_CPUCNT = 0x06, | |
| 19 | ||
| 20 | RN5T567_PSWR = 0x07, | |
| 21 | RN5T567_PONHIS = 0x09, | |
| 22 | RN5T567_POFFHIS = 0x0A, | |
| 23 | RN5T567_WATCHDOG = 0x0B, | |
| 24 | RN5T567_WATCHDOGCNT = 0x0C, | |
| 25 | RN5T567_PWRFUNC = 0x0D, | |
| 26 | RN5T567_SLPCNT = 0x0E, | |
| 27 | RN5T567_REPCNT = 0x0F, | |
| 28 | RN5T567_PWRONTIMSET = 0x10, | |
| 29 | RN5T567_NOETIMSETCNT = 0x11, | |
| 30 | RN5T567_PWRIREN = 0x12, | |
| 31 | RN5T567_PWRIRQ = 0x13, | |
| 32 | RN5T567_PWRMON = 0x14, | |
| 33 | RN5T567_PWRIRSEL = 0x15, | |
| 34 | ||
| 35 | RN5T567_DC1_SLOT = 0x16, | |
| 36 | RN5T567_DC2_SLOT = 0x17, | |
| 37 | RN5T567_DC3_SLOT = 0x18, | |
| 38 | RN5T567_DC4_SLOT = 0x19, | |
| 39 | ||
| 40 | RN5T567_LDO1_SLOT = 0x1B, | |
| 41 | RN5T567_LDO2_SLOT = 0x1C, | |
| 42 | RN5T567_LDO3_SLOT = 0x1D, | |
| 43 | RN5T567_LDO4_SLOT = 0x1E, | |
| 44 | RN5T567_LDO5_SLOT = 0x1F, | |
| 45 | ||
| 46 | RN5T567_PSO0_SLOT = 0x25, | |
| 47 | RN5T567_PSO1_SLOT = 0x26, | |
| 48 | RN5T567_PSO2_SLOT = 0x27, | |
| 49 | RN5T567_PSO3_SLOT = 0x28, | |
| 50 | ||
| 51 | RN5T567_LDORTC1_SLOT = 0x2A, | |
| 52 | ||
| 53 | RN5T567_DC1CTL = 0x2C, | |
| 54 | RN5T567_DC1CTL2 = 0x2D, | |
| 55 | RN5T567_DC2CTL = 0x2E, | |
| 56 | RN5T567_DC2CTL2 = 0x2F, | |
| 57 | RN5T567_DC3CTL = 0x30, | |
| 58 | RN5T567_DC3CTL2 = 0x31, | |
| 59 | RN5T567_DC4CTL = 0x32, | |
| 60 | RN5T567_DC4CTL2 = 0x33, | |
| 61 | ||
| 62 | RN5T567_DC1DAC = 0x36, | |
| 63 | RN5T567_DC2DAC = 0x37, | |
| 64 | RN5T567_DC3DAC = 0x38, | |
| 65 | RN5T567_DC4DAC = 0x39, | |
| 66 | ||
| 67 | RN5T567_DC1DAC_SLP = 0x3B, | |
| 68 | RN5T567_DC2DAC_SLP = 0x3C, | |
| 69 | RN5T567_DC3DAC_SLP = 0x3D, | |
| 70 | RN5T567_DC4DAC_SLP = 0x3E, | |
| 71 | ||
| 72 | RN5T567_DCIREN = 0x40, | |
| 73 | RN5T567_DCIRQ = 0x41, | |
| 74 | RN5T567_DCIRMON = 0x42, | |
| 75 | ||
| 76 | RN5T567_LDOEN1 = 0x44, | |
| 77 | RN5T567_LDOEN2 = 0x45, | |
| 78 | RN5T567_LDODIS1 = 0x46, | |
| 79 | ||
| 80 | RN5T567_LDO1DAC = 0x4C, | |
| 81 | RN5T567_LDO2DAC = 0x4D, | |
| 82 | RN5T567_LDO3DAC = 0x4E, | |
| 83 | RN5T567_LDO4DAC = 0x4F, | |
| 84 | RN5T567_LDO5DAC = 0x50, | |
| 85 | ||
| 86 | RN5T567_LDORTC1DAC = 0x56, | |
| 87 | RN5T567_LDORTC2DAC = 0x57, | |
| 88 | ||
| 89 | RN5T567_LDO1DAC_SLP = 0x58, | |
| 90 | RN5T567_LDO2DAC_SLP = 0x59, | |
| 91 | RN5T567_LDO3DAC_SLP = 0x5A, | |
| 92 | RN5T567_LDO4DAC_SLP = 0x5B, | |
| 93 | RN5T567_LDO5DAC_SLP = 0x5C, | |
| 94 | ||
| 95 | RN5T567_IOSEL = 0x90, | |
| 96 | RN5T567_IOOUT = 0x91, | |
| 97 | RN5T567_GPEDGE1 = 0x92, | |
| 98 | RN5T567_EN_GPIR = 0x94, | |
| 99 | RN5T567_IR_GPR = 0x95, | |
| 100 | RN5T567_IR_GPF = 0x96, | |
| 101 | RN5T567_MON_IOIN = 0x97, | |
| 102 | RN5T567_GPLED_FUNC = 0x98, | |
| 103 | RN5T567_INTPOL = 0x9C, | |
| 104 | RN5T567_INTEN = 0x9D, | |
| 105 | RN5T567_INTMON = 0x9E, | |
| 106 | ||
| 107 | RN5T567_PREVINDAC = 0xB0, | |
| 108 | RN5T567_OVTEMP = 0xBC, | |
| 109 | ||
| 110 | RN5T567_NUM_OF_REGS = 0xBF, | |
| 111 | }; | |
| 112 | ||
| 113 | #endif |